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Searched refs:PLATFORM_CORE_COUNT (Results 1 – 25 of 171) sorted by relevance

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/tf-a-ffa_el3_spmc/plat/imx/common/
A Dplat_imx8_gic.c20 uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
41 .rdistif_num = PLATFORM_CORE_COUNT,
103 for (int i = 0; i < PLATFORM_CORE_COUNT; i++) in plat_gic_save()
112 for (int i = 0; i < PLATFORM_CORE_COUNT; i++) in plat_gic_restore()
/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/
A Dplat_topology.c16 PLATFORM_CORE_COUNT,
29 if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/mediatek/common/drivers/gic600/
A Dmt_gic_v3.c24 uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
25 static uint32_t rdist_has_saved[PLATFORM_CORE_COUNT];
38 .rdistif_num = PLATFORM_CORE_COUNT,
51 unsigned int saved_sgi[PLATFORM_CORE_COUNT];
135 for (proc_num = 0; proc_num < PLATFORM_CORE_COUNT; proc_num++) { in mt_gic_rdistif_restore_all()
152 for (proc_num = 0; proc_num < PLATFORM_CORE_COUNT; proc_num++) { in gic_sgi_save_all()
164 for (proc_num = 0; proc_num < PLATFORM_CORE_COUNT; proc_num++) { in gic_sgi_restore_all()
/tf-a-ffa_el3_spmc/plat/allwinner/common/include/
A Dplatform_def.h67 PLATFORM_CORE_COUNT)
72 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \ macro
75 #define PLATFORM_STACK_SIZE (0x1000 / PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/socionext/uniphier/
A Duniphier_gicv3.c17 static uintptr_t uniphier_rdistif_base_addrs[PLATFORM_CORE_COUNT];
65 .rdistif_num = PLATFORM_CORE_COUNT,
74 .rdistif_num = PLATFORM_CORE_COUNT,
83 .rdistif_num = PLATFORM_CORE_COUNT,
/tf-a-ffa_el3_spmc/plat/arm/board/morello/
A Dmorello_topology.c11 CASSERT(PLATFORM_CORE_COUNT == 4U, assert_invalid_platform_core_count);
59 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = {
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dstm32mp1_topology.c15 PLATFORM_CORE_COUNT,
52 if (cpu_id >= PLATFORM_CORE_COUNT) { in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/rpi/rpi4/include/
A Dplatform_def.h25 #define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT macro
31 PLATFORM_CORE_COUNT)
89 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/include/
A Dplatform_def.h33 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \ macro
36 #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CORE_COUNT + \
/tf-a-ffa_el3_spmc/plat/amlogic/g12a/include/
A Dplatform_def.h23 #define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT macro
29 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/amlogic/gxl/include/
A Dplatform_def.h23 #define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT macro
29 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/qemu/common/
A Dqemu_gicv3.c17 static uintptr_t qemu_rdistif_base_addrs[PLATFORM_CORE_COUNT];
29 .rdistif_num = PLATFORM_CORE_COUNT,
/tf-a-ffa_el3_spmc/plat/amlogic/gxbb/include/
A Dplatform_def.h26 #define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT macro
32 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/
A Dtegra_gicv3.c19 static uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
42 tegra_gic_data.rdistif_num = PLATFORM_CORE_COUNT; in tegra_gic_setup()
/tf-a-ffa_el3_spmc/plat/amlogic/axg/include/
A Dplatform_def.h23 #define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT macro
29 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_gicv3.c13 static uintptr_t brcm_rdistif_base_addrs[PLATFORM_CORE_COUNT];
47 .rdistif_num = PLATFORM_CORE_COUNT,
/tf-a-ffa_el3_spmc/plat/rockchip/rk3288/include/
A Dplatform_def.h42 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) macro
46 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/rockchip/common/
A Drockchip_gicv3.c26 uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
43 .rdistif_num = PLATFORM_CORE_COUNT,
/tf-a-ffa_el3_spmc/plat/rockchip/rk3328/include/
A Dplatform_def.h43 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER1_CORE_COUNT + \ macro
48 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/include/
A Dplatform_def.h45 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER1_CORE_COUNT + \ macro
50 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/rockchip/px30/include/
A Dplatform_def.h46 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER1_CORE_COUNT + \ macro
51 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/arm/board/fvp/
A Dfvp_gicv3.c20 static bool fvp_gicr_rw_region_init[PLATFORM_CORE_COUNT] = {false};
24 static uintptr_t fvp_rdistif_base_addrs[PLATFORM_CORE_COUNT];
64 .rdistif_num = PLATFORM_CORE_COUNT,
/tf-a-ffa_el3_spmc/plat/rockchip/rk3368/include/
A Dplatform_def.h44 #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER1_CORE_COUNT + \ macro
49 PLATFORM_CORE_COUNT)
/tf-a-ffa_el3_spmc/plat/ti/k3/common/
A Dk3_gicv3.c20 uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
33 .rdistif_num = PLATFORM_CORE_COUNT,
/tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/include/
A Dsoc.h64 #define PLATFORM_CORE_COUNT NUMBER_OF_CLUSTERS * CORES_PER_CLUSTER macro
98 #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CORE_COUNT + \

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