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Searched refs:PLAT_CORE_LVL (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nxp/common/psci/
A Dplat_psci.c216 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
297 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
374 state->pwr_domain_state[PLAT_CORE_LVL] = in _pwr_state_validate()
377 state->pwr_domain_state[PLAT_CORE_LVL] = in _pwr_state_validate()
398 req_state->pwr_domain_state[PLAT_CORE_LVL] = PLAT_MAX_OFF_STATE; in _pwr_state_sys_suspend()
/tf-a-ffa_el3_spmc/plat/nxp/common/psci/include/
A Dplat_psci.h17 #define PLAT_CORE_LVL PSCI_CPU_PWR_LVL macro

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