Searched refs:PMUGRF_BASE (Results 1 – 9 of 9) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/pwm/ |
| A D | pwm.c | 52 val = mmio_read_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX); in disable_pwms()
58 mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX, val); in disable_pwms()
61 val = mmio_read_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX); in disable_pwms()
67 mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX, val); in disable_pwms()
100 mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX, val); in enable_pwms()
107 mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX, val); in enable_pwms()
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| /tf-a-ffa_el3_spmc/plat/rockchip/px30/drivers/pmu/ |
| A D | pmu.c | 584 mmio_read_32(PMUGRF_BASE + PMUGRF_PVTM_CON0); in pvtm_32k_config()
586 mmio_read_32(PMUGRF_BASE + PMUGRF_PVTM_CON1); in pvtm_32k_config()
588 mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0, in pvtm_32k_config()
591 mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0, in pvtm_32k_config()
597 mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0, in pvtm_32k_config()
625 mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0, in pvtm_32k_config()
638 mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON0, in pvtm_32k_config_restore()
640 mmio_write_32(PMUGRF_BASE + PMUGRF_PVTM_CON1, in pvtm_32k_config_restore()
753 mmio_write_32(PMUGRF_BASE + GPIO0A_IOMUX, in pmu_sleep_config()
826 mmio_write_32(PMUGRF_BASE + GPIO0A_IOMUX, in pmu_sleep_restore()
[all …]
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| /tf-a-ffa_el3_spmc/plat/rockchip/px30/drivers/soc/ |
| A D | soc.c | 95 tmp = mmio_read_32(PMUGRF_BASE + PMUGRF_SOC_CON(3)); in soc_reset_config_all()
97 mmio_write_32(PMUGRF_BASE + PMUGRF_SOC_CON(3), tmp); in soc_reset_config_all()
124 mmio_write_32(PMUGRF_BASE + PMUGRF_SOC_CON(2), in px30_soc_reset_config()
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/dram/ |
| A D | dram.c | 19 os_reg2_val = mmio_read_32(PMUGRF_BASE + PMUGRF_OSREG(2)); in dram_init()
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| A D | dfs.c | 1745 channel_mask = (mmio_read_32(PMUGRF_BASE + PMUGRF_OSREG(2)) >> 28) & in exit_low_power()
1783 channel_mask = (mmio_read_32(PMUGRF_BASE + PMUGRF_OSREG(2)) >> 28) & in resume_low_power()
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| /tf-a-ffa_el3_spmc/plat/rockchip/px30/ |
| A D | px30_def.h | 24 #define PMUGRF_BASE 0xff010000 macro
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/include/shared/ |
| A D | addressmap_shared.h | 27 #define PMUGRF_BASE (MMIO_BASE + 0x07320000) macro
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/gpio/ |
| A D | rk3399_gpio.c | 172 val = mmio_read_32(PMUGRF_BASE + PMU_GRF_GPIO0A_P + in get_pull()
231 mmio_write_32(PMUGRF_BASE + PMU_GRF_GPIO0A_P + in set_pull()
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/pmu/ |
| A D | pmu.c | 891 mmio_write_32(PMUGRF_BASE + PMUGRF_SOC_CON0, EXTERNAL_32K); in sys_slp_config()
892 mmio_write_32(PMUGRF_BASE, IOMUX_CLK_32K); /* 32k iomux */ in sys_slp_config()
1550 mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1A_IOMUX, in rockchip_soc_system_off()
1618 mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_SMT, GPIO0A0_SMT_ENABLE); in plat_rockchip_pmu_init()
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