Searched refs:PWR_RST_B (Results 1 – 5 of 5) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spmc/ |
| A D | mtspmc.c | 93 mmio_setbits_32(per_cpu(0, 1, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
94 mmio_setbits_32(per_cpu(0, 2, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
95 mmio_setbits_32(per_cpu(0, 3, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
96 mmio_setbits_32(per_cpu(0, 4, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
97 mmio_setbits_32(per_cpu(0, 5, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
98 mmio_setbits_32(per_cpu(0, 6, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
99 mmio_setbits_32(per_cpu(0, 7, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
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| A D | mtspmc_private.h | 86 #define PWR_RST_B BIT(0) macro
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spmc/ |
| A D | mtspmc.c | 93 mmio_setbits_32(per_cpu(0, 1, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
94 mmio_setbits_32(per_cpu(0, 2, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
95 mmio_setbits_32(per_cpu(0, 3, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
96 mmio_setbits_32(per_cpu(0, 4, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
97 mmio_setbits_32(per_cpu(0, 5, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
98 mmio_setbits_32(per_cpu(0, 6, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
99 mmio_setbits_32(per_cpu(0, 7, SPM_CPU_PWR), PWR_RST_B); in spmc_init()
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| A D | mtspmc_private.h | 86 #define PWR_RST_B BIT(0) macro
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8173/drivers/mtcmos/ |
| A D | mtcmos.c | 23 PWR_RST_B = 1U << 0 enumerator
144 mmio_clrbits_32(reg_pwr_con, PWR_RST_B); in mtcmos_ctrl_little_off()
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