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Searched refs:QOSWT_WTSET0_SSLOT0 (Results 1 – 10 of 10) sorted by relevance

/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/M3N/
A Dqos_init_m3n_v10.c35 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
39 #define QOSWT_WTSET1_SSLOT1 QOSWT_WTSET0_SSLOT0
189 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_m3n_v10()
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/G2N/
A Dqos_init_g2n_v10.c34 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
38 #define QOSWT_WTSET1_SSLOT1 QOSWT_WTSET0_SSLOT0
183 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_g2n_v10()
/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/H3/
A Dqos_init_h3n_v30.c36 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
40 #define QOSWT_WTSET1_SSLOT1 (QOSWT_WTSET0_SSLOT0)
216 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_h3n_v30()
A Dqos_init_h3_v30.c36 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
40 #define QOSWT_WTSET1_SSLOT1 (QOSWT_WTSET0_SSLOT0)
222 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_h3_v30()
A Dqos_init_h3_v20.c36 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
220 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_h3_v20()
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/G2H/
A Dqos_init_g2h_v30.c33 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
37 #define QOSWT_WTSET1_SSLOT1 (QOSWT_WTSET0_SSLOT0)
203 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_g2h_v30()
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/G2M/
A Dqos_init_g2m_v11.c51 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
204 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0); in qos_init_g2m_v11()
A Dqos_init_g2m_v30.c51 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
197 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0); in qos_init_g2m_v30()
/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/M3/
A Dqos_init_m3_v11.c36 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
209 (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT_WTSET0_SLOTSLOT0)); in qos_init_m3_v11()
A Dqos_init_m3_v30.c36 #define QOSWT_WTSET0_SSLOT0 (QOSWT_WTSET0_REQ_SSLOT0 - 1U) macro
197 …io_write_32(QOSWT_WTSET0, ((QOSWT_WTSET0_PERIOD0_M3_30 << 16) | (QOSWT_WTSET0_SSLOT0 << 8) | QOSWT… in qos_init_m3_v30()

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