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Searched refs:RCC_BDCR_VSWRST (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dbl2_plat_setup.c212 mmio_setbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); in bl2_el3_plat_arch_setup()
214 while ((mmio_read_32(rcc_base + RCC_BDCR) & RCC_BDCR_VSWRST) == in bl2_el3_plat_arch_setup()
219 mmio_clrbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); in bl2_el3_plat_arch_setup()
/tf-a-ffa_el3_spmc/include/drivers/st/
A Dstm32mp1_rcc.h304 #define RCC_BDCR_VSWRST BIT(31) macro

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