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Searched refs:RCC_MP_RSTSCLRR_IWDG2RSTF (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dbl2_plat_setup.c96 if ((rstsr & RCC_MP_RSTSCLRR_IWDG2RSTF) != 0U) { in print_reset_reason()
/tf-a-ffa_el3_spmc/include/drivers/st/
A Dstm32mp1_rcc.h423 #define RCC_MP_RSTSCLRR_IWDG2RSTF BIT(9) macro

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