Searched refs:REG_SOC_WMSK (Results 1 – 8 of 8) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/soc/ |
| A D | soc.c | 128 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 0), src[0] | REG_SOC_WMSK); in restore_pll()
129 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 1), src[1] | REG_SOC_WMSK); in restore_pll()
131 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 4), src[4] | REG_SOC_WMSK); in restore_pll()
132 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 5), src[5] | REG_SOC_WMSK); in restore_pll()
135 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 3), src[3] | REG_SOC_WMSK); in restore_pll()
199 mmio_write_32(PMUCRU_BASE + PMUCRU_GATE_CON(i), REG_SOC_WMSK); in clk_gate_con_disable()
202 mmio_write_32(CRU_BASE + CRU_GATE_CON(i), REG_SOC_WMSK); in clk_gate_con_disable()
211 REG_SOC_WMSK | slp_data.pmucru_gate_con[i]); in clk_gate_con_restore()
215 REG_SOC_WMSK | slp_data.cru_gate_con[i]); in clk_gate_con_restore()
291 pmu_slp_data.pmucru_rstnhold_con0 | REG_SOC_WMSK); in restore_pmu_rsthold()
[all …]
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| A D | soc.h | 51 #define REG_SOC_WMSK 0xffff0000 macro
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/pmu/ |
| A D | pmu.c | 946 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
948 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
950 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
966 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
968 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
983 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
985 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
1000 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
1002 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
1016 REG_SOC_WMSK | GRF_IOMUX_GPIO); in suspend_apio()
[all …]
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/secure/ |
| A D | secure.c | 139 REG_SOC_WMSK | SGRF_SOC_ALLMST_NS); in secure_sgrf_init()
141 REG_SOC_WMSK | SGRF_SOC_ALLMST_NS); in secure_sgrf_init()
143 REG_SOC_WMSK | SGRF_SOC_ALLMST_NS); in secure_sgrf_init()
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3288/drivers/soc/ |
| A D | soc.c | 140 slp_data.pll_mode | REG_SOC_WMSK); in clk_plls_resume()
157 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), REG_SOC_WMSK); in clk_gate_con_disable()
166 REG_SOC_WMSK | slp_data.cru_gate_con[i]); in clk_gate_con_restore()
189 val = slp_data.cru_sel_con[i] | REG_SOC_WMSK; in clk_sel_con_restore()
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| A D | soc.h | 94 #define REG_SOC_WMSK 0xffff0000 macro
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/dram/ |
| A D | suspend.c | 657 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 0), src[0] | REG_SOC_WMSK); in pmusram_restore_pll()
658 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 1), src[1] | REG_SOC_WMSK); in pmusram_restore_pll()
660 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 4), src[4] | REG_SOC_WMSK); in pmusram_restore_pll()
661 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 5), src[5] | REG_SOC_WMSK); in pmusram_restore_pll()
663 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 3), src[3] | REG_SOC_WMSK); in pmusram_restore_pll()
805 cru_clksel_con6 | REG_SOC_WMSK); in dmc_resume()
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/gpio/ |
| A D | rk3399_gpio.c | 356 cru_gate_save | REG_SOC_WMSK); in plat_rockchip_save_gpio()
375 REG_SOC_WMSK | store_grf_gpio[i]); in plat_rockchip_restore_gpio()
406 cru_gate_save | REG_SOC_WMSK); in plat_rockchip_restore_gpio()
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