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Searched refs:SCSRSTECR4 (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/renesas/common/include/registers/
A Dcpg_registers.h72 #define SCSRSTECR4 (CPG_BASE + 0x0B90U) macro
/tf-a-ffa_el3_spmc/plat/renesas/common/
A Dbl2_cpg_init.c100 cpg_write(SCSRSTECR4, reset_cr4); in bl2_secure_cpg_init()

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