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Searched refs:SECURE (Results 1 – 25 of 71) sorted by relevance

123

/tf-a-ffa_el3_spmc/services/spd/tspd/
A Dtspd_main.c64 assert(handle == cm_get_context(SECURE)); in tspd_handle_sp_preemption()
65 cm_el1_sysregs_context_save(SECURE); in tspd_handle_sp_preemption()
166 cm_el1_sysregs_context_save(SECURE); in tspd_sel1_interrupt_handler()
202 cm_el1_sysregs_context_restore(SECURE); in tspd_sel1_interrupt_handler()
206 cm_set_next_eret_context(SECURE); in tspd_sel1_interrupt_handler()
286 bl31_set_next_image_type(SECURE); in tspd_setup()
497 cm_el1_sysregs_context_save(SECURE); in tspd_smc_handler()
610 cm_set_elr_el3(SECURE, (uint64_t) in tspd_smc_handler()
614 cm_set_elr_el3(SECURE, (uint64_t) in tspd_smc_handler()
640 cm_set_next_eret_context(SECURE); in tspd_smc_handler()
[all …]
A Dtspd_common.c48 cm_set_context(&tsp_ctx->cpu_ctx, SECURE); in tspd_init_tsp_ep_state()
51 ep_attr = SECURE | EP_ST_ENABLE; in tspd_init_tsp_ep_state()
79 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx); in tspd_synchronous_sp_entry()
80 cm_el1_sysregs_context_restore(SECURE); in tspd_synchronous_sp_entry()
81 cm_set_next_eret_context(SECURE); in tspd_synchronous_sp_entry()
104 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx); in tspd_synchronous_sp_exit()
105 cm_el1_sysregs_context_save(SECURE); in tspd_synchronous_sp_exit()
131 cm_set_elr_el3(SECURE, in tspd_abort_preempted_smc()
A Dtspd_pm.c46 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_off_entry); in tspd_cpu_off_handler()
85 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_suspend_entry); in tspd_cpu_suspend_handler()
128 disable_intr_rm_local(INTR_TYPE_NS, SECURE); in tspd_cpu_on_finish_handler()
163 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_resume_entry); in tspd_cpu_suspend_finish_handler()
205 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->system_off_entry); in tspd_system_off()
231 cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->system_reset_entry); in tspd_system_reset()
/tf-a-ffa_el3_spmc/services/spd/tlkd/
A Dtlkd_common.c28 cm_el1_sysregs_context_save(SECURE); in tlkd_va_translate()
65 cm_el1_sysregs_context_restore(SECURE); in tlkd_va_translate()
68 write_scr(cm_get_scr_el3(SECURE)); in tlkd_va_translate()
95 cm_set_context(&tlk_ctx->cpu_ctx, SECURE); in tlkd_init_tlk_ep_state()
106 ep_attr = SECURE | EP_ST_ENABLE; in tlkd_init_tlk_ep_state()
131 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); in tlkd_synchronous_sp_entry()
132 cm_el1_sysregs_context_restore(SECURE); in tlkd_synchronous_sp_entry()
133 cm_set_next_eret_context(SECURE); in tlkd_synchronous_sp_entry()
157 assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx); in tlkd_synchronous_sp_exit()
158 cm_el1_sysregs_context_save(SECURE); in tlkd_synchronous_sp_exit()
A Dtlkd_main.c72 disable_intr_rm_local(INTR_TYPE_S_EL1, SECURE); in tlkd_interrupt_handler()
82 s_cpu_context = cm_get_context(SECURE); in tlkd_interrupt_handler()
90 cm_el1_sysregs_context_restore(SECURE); in tlkd_interrupt_handler()
91 cm_set_next_eret_context(SECURE); in tlkd_interrupt_handler()
233 assert(handle == cm_get_context(SECURE)); in tlkd_smc_handler()
234 cm_el1_sysregs_context_save(SECURE); in tlkd_smc_handler()
319 cm_el1_sysregs_context_restore(SECURE); in tlkd_smc_handler()
320 cm_set_next_eret_context(SECURE); in tlkd_smc_handler()
391 cm_el1_sysregs_context_save(SECURE); in tlkd_smc_handler()
458 assert(handle == cm_get_context(SECURE)); in tlkd_smc_handler()
[all …]
/tf-a-ffa_el3_spmc/services/spd/opteed/
A Dopteed_main.c73 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); in opteed_sel1_interrupt_handler()
76 cm_el1_sysregs_context_restore(SECURE); in opteed_sel1_interrupt_handler()
77 cm_set_next_eret_context(SECURE); in opteed_sel1_interrupt_handler()
109 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); in opteed_setup()
232 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); in opteed_smc_handler()
239 cm_set_elr_el3(SECURE, (uint64_t) in opteed_smc_handler()
242 cm_set_elr_el3(SECURE, (uint64_t) in opteed_smc_handler()
246 cm_el1_sysregs_context_restore(SECURE); in opteed_smc_handler()
247 cm_set_next_eret_context(SECURE); in opteed_smc_handler()
363 assert(handle == cm_get_context(SECURE)); in opteed_smc_handler()
[all …]
A Dopteed_common.c39 cm_set_context(&optee_ctx->cpu_ctx, SECURE); in opteed_init_optee_ep_state()
42 ep_attr = SECURE | EP_ST_ENABLE; in opteed_init_optee_ep_state()
78 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx); in opteed_synchronous_sp_entry()
79 cm_el1_sysregs_context_restore(SECURE); in opteed_synchronous_sp_entry()
80 cm_set_next_eret_context(SECURE); in opteed_synchronous_sp_entry()
103 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx); in opteed_synchronous_sp_exit()
104 cm_el1_sysregs_context_save(SECURE); in opteed_synchronous_sp_exit()
A Dopteed_pm.c39 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->cpu_off_entry); in opteed_cpu_off_handler()
75 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->cpu_suspend_entry); in opteed_cpu_suspend_handler()
144 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->cpu_resume_entry); in opteed_cpu_suspend_finish_handler()
180 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->system_off_entry); in opteed_system_off()
200 cm_set_elr_el3(SECURE, (uint64_t) &optee_vector_table->system_reset_entry); in opteed_system_reset()
/tf-a-ffa_el3_spmc/services/std_svc/spm/spm_mm/
A Dspm_mm_common.c91 cm_set_context(&(ctx->cpu_ctx), SECURE); in spm_sp_synchronous_entry()
94 cm_el1_sysregs_context_restore(SECURE); in spm_sp_synchronous_entry()
95 cm_set_next_eret_context(SECURE); in spm_sp_synchronous_entry()
105 cm_el1_sysregs_context_save(SECURE); in spm_sp_synchronous_entry()
/tf-a-ffa_el3_spmc/plat/arm/common/aarch64/
A Darm_bl2_mem_params_desc.c27 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
45 SECURE | EXECUTABLE | EP_FIRST_EXE),
65 SECURE | EXECUTABLE | EP_FIRST_EXE),
97 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
108 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
127 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
145 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
160 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/qemu/common/
A Dqemu_bl2_mem_params_desc.c27 SECURE | EXECUTABLE | EP_FIRST_EXE),
44 SECURE | EXECUTABLE | EP_FIRST_EXE),
66 #define BL32_EP_ATTRIBS (SECURE | EXECUTABLE)
69 #define BL32_EP_ATTRIBS (SECURE | EXECUTABLE | EP_FIRST_EXE)
97 entry_point_info_t, SECURE | NON_EXECUTABLE),
115 entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/
A Dhikey960_bl2_mem_params_desc.c28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
46 SECURE | EXECUTABLE | EP_FIRST_EXE),
66 SECURE | EXECUTABLE | EP_FIRST_EXE),
92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
111 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
129 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/marvell/armada/common/aarch64/
A Dmarvell_bl2_mem_params_desc.c29 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
47 SECURE | EXECUTABLE | EP_FIRST_EXE),
67 SECURE | EXECUTABLE | EP_FIRST_EXE),
93 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
113 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
132 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/
A Dhikey_bl2_mem_params_desc.c28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
46 SECURE | EXECUTABLE | EP_FIRST_EXE),
66 SECURE | EXECUTABLE | EP_FIRST_EXE),
92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
111 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
129 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/
A Dbl2_plat_mem_params_desc.c28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
46 SECURE | EXECUTABLE | EP_FIRST_EXE),
66 SECURE | EXECUTABLE | EP_FIRST_EXE),
92 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
111 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
129 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/
A Dimx8mm_bl2_mem_params_desc.c17 SECURE | EXECUTABLE | EP_FIRST_EXE),
32 SECURE | EXECUTABLE),
48 SECURE | NON_EXECUTABLE),
63 SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/bl1/tbbr/
A Dtbbr_img_desc.c20 VERSION_1, entry_point_info_t, SECURE),
38 VERSION_1, entry_point_info_t, SECURE),
49 VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/rpi/rpi3/aarch64/
A Drpi3_bl2_mem_params_desc.c29 SECURE | EXECUTABLE | EP_FIRST_EXE),
56 SECURE | EXECUTABLE),
77 SECURE | NON_EXECUTABLE),
98 SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/imx/imx7/common/
A Dimx7_bl2_mem_params_desc.c19 SECURE | EXECUTABLE | EP_FIRST_EXE),
35 SECURE | NON_EXECUTABLE),
50 SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/bl1/
A Dbl1_fwu.c245 if (GET_SECURITY_STATE(flags) == SECURE) { in bl1_fwu_image_copy()
382 if (GET_SECURITY_STATE(flags) == SECURE) { in bl1_fwu_image_auth()
389 if (GET_SECURITY_STATE(desc->ep_info.h.attr) == SECURE) { in bl1_fwu_image_auth()
519 (GET_SECURITY_STATE(flags) == SECURE) || in bl1_fwu_image_execute()
541 *handle = cm_get_context(SECURE); in bl1_fwu_image_execute()
543 *handle = smc_get_ctx(SECURE); in bl1_fwu_image_execute()
573 assert(GET_SECURITY_STATE(desc->ep_info.h.attr) == SECURE); in bl1_fwu_image_resume()
576 if (caller_sec_state == SECURE) { in bl1_fwu_image_resume()
587 resume_sec_state = SECURE; in bl1_fwu_image_resume()
591 (resume_sec_state == SECURE) ? "secure" : "normal"); in bl1_fwu_image_resume()
[all …]
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dplat_bl2_mem_params_desc.c28 SECURE | EXECUTABLE | EP_FIRST_EXE),
58 SECURE | NON_EXECUTABLE),
72 SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/plat/intel/soc/common/
A Dbl2_plat_mem_params_desc.c28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
46 SECURE | EXECUTABLE | EP_FIRST_EXE),
66 SECURE | EXECUTABLE | EP_FIRST_EXE),
/tf-a-ffa_el3_spmc/plat/arm/board/diphda/common/
A Ddiphda_bl2_mem_params_desc.c27 SECURE | EXECUTABLE | EP_FIRST_EXE),
45 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
63 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
/tf-a-ffa_el3_spmc/include/common/
A Dep_info.h19 #define SECURE EP_SECURE macro
21 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_bl2_mem_params_desc.c28 VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
45 SECURE | EXECUTABLE | EP_FIRST_EXE),
71 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),

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