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Searched refs:SEC_GRP1COND15 (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/renesas/common/
A Dbl2_secure_setting.c224 { SEC_GRP1COND15, 0x000000C0U },
/tf-a-ffa_el3_spmc/plat/renesas/common/include/registers/
A Dlifec_registers.h68 #define SEC_GRP1COND15 (LIFEC_SEC_BASE + 0x01D4U) macro

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