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Searched refs:SET_SECURITY_STATE (Results 1 – 23 of 23) sorted by relevance

/tf-a-ffa_el3_spmc/plat/marvell/armada/common/
A Dmarvell_bl31_setup.c83 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in marvell_bl31_early_platform_setup()
99 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in marvell_bl31_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/allwinner/common/
A Dsunxi_bl31_setup.c91 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
104 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/
A Dimx8mm_bl31_setup.c125 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
130 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mn/
A Dimx8mn_bl31_setup.c125 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
130 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mp/
A Dimx8mp_bl31_setup.c123 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
128 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/
A Dbl31_plat_setup.c214 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
230 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
366 SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); in bl31_plat_get_next_kernel64_ep_info()
412 SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); in bl31_plat_get_next_kernel32_ep_info()
/tf-a-ffa_el3_spmc/plat/layerscape/common/
A Dls_bl31_setup.c86 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in ls_bl31_early_platform_setup()
103 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in ls_bl31_early_platform_setup()
/tf-a-ffa_el3_spmc/include/common/
A Dep_info.h30 #define SET_SECURITY_STATE(x, security) \ macro
/tf-a-ffa_el3_spmc/plat/socionext/synquacer/
A Dsq_bl31_setup.c97 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
116 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/xilinx/versal/
A Dbl31_versal_setup.c102 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
104 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/ti/k3/common/
A Dk3_bl31_setup.c78 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
85 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mq/
A Dimx8mq_bl31_setup.c147 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
152 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_bl31_setup.c107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in brcm_bl31_early_platform_setup()
124 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in brcm_bl31_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/
A Dbl31_zynqmp_setup.c103 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
105 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/arm/common/
A Darm_bl31_setup.c124 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in arm_bl31_early_platform_setup()
153 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_bl31_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/arm/common/sp_min/
A Darm_sp_min_setup.c86 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_sp_min_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/intel/soc/agilex/
A Dbl31_plat_setup.c80 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/intel/soc/stratix10/
A Dbl31_plat_setup.c88 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/arm/board/arm_fpga/
A Dfpga_bl31_setup.c57 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/rpi/rpi4/
A Drpi4_bl31_setup.c141 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/common/
A Dimx_sip_handler.c249 SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); in imx_kernel_entry_handler()
/tf-a-ffa_el3_spmc/plat/imx/imx8qx/
A Dimx8qx_bl31_setup.c328 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/imx8qm/
A Dimx8qm_bl31_setup.c354 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()

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