/tf-a-ffa_el3_spmc/plat/marvell/armada/common/ |
A D | marvell_bl31_setup.c | 83 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in marvell_bl31_early_platform_setup() 99 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in marvell_bl31_early_platform_setup()
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/tf-a-ffa_el3_spmc/plat/allwinner/common/ |
A D | sunxi_bl31_setup.c | 91 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2() 104 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/ |
A D | imx8mm_bl31_setup.c | 125 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2() 130 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mn/ |
A D | imx8mn_bl31_setup.c | 125 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2() 130 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mp/ |
A D | imx8mp_bl31_setup.c | 123 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2() 128 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/ |
A D | bl31_plat_setup.c | 214 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2() 230 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2() 366 SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); in bl31_plat_get_next_kernel64_ep_info() 412 SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); in bl31_plat_get_next_kernel32_ep_info()
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/tf-a-ffa_el3_spmc/plat/layerscape/common/ |
A D | ls_bl31_setup.c | 86 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in ls_bl31_early_platform_setup() 103 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in ls_bl31_early_platform_setup()
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/tf-a-ffa_el3_spmc/include/common/ |
A D | ep_info.h | 30 #define SET_SECURITY_STATE(x, security) \ macro
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/tf-a-ffa_el3_spmc/plat/socionext/synquacer/ |
A D | sq_bl31_setup.c | 97 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2() 116 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/xilinx/versal/ |
A D | bl31_versal_setup.c | 102 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2() 104 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/ti/k3/common/ |
A D | k3_bl31_setup.c | 78 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2() 85 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mq/ |
A D | imx8mq_bl31_setup.c | 147 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2() 152 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/brcm/common/ |
A D | brcm_bl31_setup.c | 107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in brcm_bl31_early_platform_setup() 124 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in brcm_bl31_early_platform_setup()
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/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/ |
A D | bl31_zynqmp_setup.c | 103 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2() 105 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/arm/common/ |
A D | arm_bl31_setup.c | 124 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in arm_bl31_early_platform_setup() 153 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_bl31_early_platform_setup()
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/tf-a-ffa_el3_spmc/plat/arm/common/sp_min/ |
A D | arm_sp_min_setup.c | 86 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_sp_min_early_platform_setup()
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/tf-a-ffa_el3_spmc/plat/intel/soc/agilex/ |
A D | bl31_plat_setup.c | 80 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/intel/soc/stratix10/ |
A D | bl31_plat_setup.c | 88 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/arm/board/arm_fpga/ |
A D | fpga_bl31_setup.c | 57 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/rpi/rpi4/ |
A D | rpi4_bl31_setup.c | 141 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/imx/common/ |
A D | imx_sip_handler.c | 249 SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); in imx_kernel_entry_handler()
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/tf-a-ffa_el3_spmc/plat/imx/imx8qx/ |
A D | imx8qx_bl31_setup.c | 328 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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/tf-a-ffa_el3_spmc/plat/imx/imx8qm/ |
A D | imx8qm_bl31_setup.c | 354 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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