| /tf-a-ffa_el3_spmc/services/std_svc/ |
| A D | pci_svc.c | 74 SMC_RET2(handle, SMC_PCI_CALL_INVAL_PARAM, 0U); in pci_smc_handler()
77 SMC_RET2(handle, SMC_PCI_CALL_INVAL_PARAM, 0U); in pci_smc_handler()
80 SMC_RET2(handle, SMC_PCI_CALL_INVAL_PARAM, 0U); in pci_smc_handler()
82 SMC_RET2(handle, SMC_PCI_CALL_SUCCESS, ret); in pci_smc_handler()
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| A D | std_svc_setup.c | 192 SMC_RET2(handle, STD_SVC_VERSION_MAJOR, STD_SVC_VERSION_MINOR); in std_svc_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8192/ |
| A D | plat_sip_calls.c | 31 SMC_RET2(handle, ret, x4); in mediatek_plat_sip_handler()
36 SMC_RET2(handle, ret, rnd_val0); in mediatek_plat_sip_handler()
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| /tf-a-ffa_el3_spmc/plat/nxp/common/sip_svc/ |
| A D | sip_svc.c | 97 SMC_RET2(handle, SMC_OK, ret); in nxp_sip_handler()
120 SMC_RET2(handle, SMC_OK, in nxp_sip_handler()
148 SMC_RET2(handle, SMC_OK, ret); in nxp_sip_handler()
177 SMC_RET2(handle, LS_SIP_SVC_VERSION_MAJOR, in sip_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/marvell/armada/common/ |
| A D | mrvl_sip_svc.c | 151 SMC_RET2(handle, ret, read); in mrvl_sip_smc_handler()
155 SMC_RET2(handle, ret, read); in mrvl_sip_smc_handler()
165 SMC_RET2(handle, ret, read); in mrvl_sip_smc_handler()
173 SMC_RET2(handle, ret, read); in mrvl_sip_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8195/ |
| A D | plat_sip_calls.c | 29 SMC_RET2(handle, ret, ret_val); in mediatek_plat_sip_handler()
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| /tf-a-ffa_el3_spmc/plat/xilinx/versal/pm_service/ |
| A D | pm_svc_main.c | 219 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buff[0] << 32), in pm_smc_handler()
246 SMC_RET2(handle, in pm_smc_handler()
302 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)data[0] << 32), in pm_smc_handler()
351 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)rate[0] << 32), in pm_smc_handler()
390 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), in pm_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey/ |
| A D | hisi_sip_svc.c | 67 SMC_RET2(handle, HISI_SIP_SVC_VERSION_MAJOR, HISI_SIP_SVC_VERSION_MINOR); in hisi_sip_handler()
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| /tf-a-ffa_el3_spmc/lib/pmf/ |
| A D | pmf_smc.c | 57 SMC_RET2(handle, rc, ts_value); in pmf_smc_handler()
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| /tf-a-ffa_el3_spmc/include/arch/aarch64/ |
| A D | smccc_helpers.h | 26 #define SMC_RET2(_h, _x0, _x1) { \ macro
32 SMC_RET2(_h, (_x0), (_x1)); \
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| /tf-a-ffa_el3_spmc/plat/qti/common/src/ |
| A D | qti_syscall.c | 268 SMC_RET2(handle, QTI_SIP_SUCCESS, ret); in qti_sip_mem_assign()
276 SMC_RET2(handle, QTI_SIP_INVALID_PARAM, ret); in qti_sip_mem_assign()
314 SMC_RET2(handle, QTI_SIP_SVC_VERSION_MAJOR, in qti_sip_handler()
322 SMC_RET2(handle, QTI_SIP_SUCCESS, in qti_sip_handler()
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| /tf-a-ffa_el3_spmc/plat/st/stm32mp1/services/ |
| A D | stm32mp1_svc_setup.c | 87 SMC_RET2(handle, ret1, ret2); in stm32mp1_svc_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/mediatek/common/custom/ |
| A D | oem_svc.c | 84 SMC_RET2(handle, OEM_VERSION_MAJOR, OEM_VERSION_MINOR); in oem_svc_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/pm_service/ |
| A D | pm_svc_main.c | 364 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buff[0] << 32), in pm_smc_handler()
424 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), in pm_smc_handler()
438 SMC_RET2(handle, in pm_smc_handler()
490 SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32), in pm_smc_handler()
533 SMC_RET2(handle, (uint64_t)ret | in pm_smc_handler()
575 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), in pm_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/rockchip/common/ |
| A D | rockchip_sip_svc.c | 67 SMC_RET2(handle, RK_SIP_SVC_VERSION_MAJOR, in sip_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/xilinx/versal/ |
| A D | sip_svc_setup.c | 87 SMC_RET2(handle, SIP_SVC_VERSION_MAJOR, SIP_SVC_VERSION_MINOR); in sip_svc_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/ |
| A D | sip_svc_setup.c | 90 SMC_RET2(handle, SIP_SVC_VERSION_MAJOR, SIP_SVC_VERSION_MINOR); in sip_svc_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/arm/common/ |
| A D | arm_sip_svc.c | 125 SMC_RET2(handle, ARM_SIP_SVC_VERSION_MAJOR, ARM_SIP_SVC_VERSION_MINOR); in arm_sip_handler()
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| /tf-a-ffa_el3_spmc/include/arch/aarch32/ |
| A D | smccc_helpers.h | 121 #define SMC_RET2(_h, _r0, _r1) { \ macro
127 SMC_RET2(_h, (_r0), (_r1)); \
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| /tf-a-ffa_el3_spmc/services/spd/tspd/ |
| A D | tspd_main.c | 215 SMC_RET2(&tsp_ctx->cpu_ctx, TSP_HANDLE_SEL1_INTR_AND_RETURN, read_elr_el3()); in tspd_sel1_interrupt_handler()
770 SMC_RET2(handle, x1, x2); in tspd_smc_handler()
785 SMC_RET2(handle, TSP_VERSION_MAJOR, TSP_VERSION_MINOR); in tspd_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/mediatek/common/ |
| A D | mtk_sip_svc.c | 112 SMC_RET2(handle, MTK_SIP_SVC_VERSION_MAJOR, in sip_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/arm/common/aarch64/ |
| A D | execution_state_switch.c | 172 SMC_RET2(handle, cookie_hi, cookie_lo); in arm_execution_state_switch()
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| /tf-a-ffa_el3_spmc/drivers/arm/ethosn/ |
| A D | ethosn_smc.c | 140 SMC_RET2(handle, ETHOSN_VERSION_MAJOR, ETHOSN_VERSION_MINOR); in ethosn_smc_handler()
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| /tf-a-ffa_el3_spmc/lib/debugfs/ |
| A D | debugfs_smc.c | 197 SMC_RET2(handle, smc_ret, smc_resp); in debugfs_smc_handler()
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| /tf-a-ffa_el3_spmc/plat/imx/common/ |
| A D | imx_sip_handler.c | 123 SMC_RET2(handle, ret, fuse); in imx_otp_handler()
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