Searched refs:STIMER1_BASE (Results 1 – 4 of 4) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/rockchip/rk3288/drivers/secure/ |
| A D | secure.c | 94 mmio_write_32(STIMER1_BASE + TIMER_CONTROL_REG, 0); in sram_secure_timer_init()
96 mmio_write_32(STIMER1_BASE + TIMER_LOAD_COUNT0, 0xffffffff); in sram_secure_timer_init()
97 mmio_write_32(STIMER1_BASE + TIMER_LOAD_COUNT1, 0xffffffff); in sram_secure_timer_init()
100 mmio_write_32(STIMER1_BASE + TIMER_CONTROL_REG, TIMER_EN); in sram_secure_timer_init()
112 mmio_write_32(STIMER1_BASE + TIMER_CONTROL_REG, 0); in secure_timer_init()
114 mmio_write_32(STIMER1_BASE + TIMER_LOAD_COUNT0, 0xffffffff); in secure_timer_init()
115 mmio_write_32(STIMER1_BASE + TIMER_LOAD_COUNT1, 0xffffffff); in secure_timer_init()
118 mmio_write_32(STIMER1_BASE + TIMER_CONTROL_REG, TIMER_EN); in secure_timer_init()
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| A D | secure.h | 91 #define STIMER1_BASE (STIME_BASE + 0x20) macro
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3368/drivers/soc/ |
| A D | soc.c | 70 mmio_write_32(STIMER1_BASE + TIMER_LOADE_COUNT0, 0xffffffff); in secure_timer_init()
71 mmio_write_32(STIMER1_BASE + TIMER_LOADE_COUNT1, 0xffffffff); in secure_timer_init()
74 mmio_write_32(STIMER1_BASE + TIMER_CONTROL_REG, TIMER_EN); in secure_timer_init()
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| A D | soc.h | 32 #define STIMER1_BASE (STIME_BASE + 0x20) macro
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