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Searched refs:TEGRA_RST_DEV_SET_U (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t210/
A Dplat_psci_handlers.c297 mmio_write_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEV_SET_U, val); in tegra_reset_all_dma_masters()
331 val = mmio_read_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEV_SET_U); in tegra_reset_all_dma_masters()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t210/
A Dtegra_def.h144 #define TEGRA_RST_DEV_SET_U U(0x310) macro

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