Searched refs:TEGRA_SID_XUSB_VF0 (Results 1 – 3 of 3) sorted by relevance
300 XUSB_PADCTL_HOST_AXI_STREAMID_VF_0, TEGRA_SID_XUSB_VF0); in plat_early_platform_setup()302 XUSB_PADCTL_HOST_AXI_STREAMID_VF_0) == TEGRA_SID_XUSB_VF0); in plat_early_platform_setup()
424 XUSB_PADCTL_HOST_AXI_STREAMID_VF_0, TEGRA_SID_XUSB_VF0); in tegra_soc_pwr_domain_on_finish()426 XUSB_PADCTL_HOST_AXI_STREAMID_VF_0) == TEGRA_SID_XUSB_VF0); in tegra_soc_pwr_domain_on_finish()
299 #define TEGRA_SID_XUSB_VF0 U(0x5d) macro
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