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Searched refs:TEGRA_SID_XUSB_VF1 (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/
A Dplat_setup.c304 XUSB_PADCTL_HOST_AXI_STREAMID_VF_1, TEGRA_SID_XUSB_VF1); in plat_early_platform_setup()
306 XUSB_PADCTL_HOST_AXI_STREAMID_VF_1) == TEGRA_SID_XUSB_VF1); in plat_early_platform_setup()
A Dplat_psci_handlers.c428 XUSB_PADCTL_HOST_AXI_STREAMID_VF_1, TEGRA_SID_XUSB_VF1); in tegra_soc_pwr_domain_on_finish()
430 XUSB_PADCTL_HOST_AXI_STREAMID_VF_1) == TEGRA_SID_XUSB_VF1); in tegra_soc_pwr_domain_on_finish()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t194/
A Dtegra_def.h300 #define TEGRA_SID_XUSB_VF1 U(0x5e) macro

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