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Searched refs:UART0_SIN_MODE_SEL_CONTROL (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/include/
A Dsr_def.h278 #define UART0_SIN_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x4a8) macro
/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/src/
A Dbl2_setup.c95 mmio_write_32(UART0_SIN_MODE_SEL_CONTROL, 1); in plat_bcm_bl2_early_platform_setup()

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