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Searched refs:__COHERENT_RAM_END__ (Results 1 – 10 of 10) sorted by relevance

/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/
A Dbl31.ld.S99 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/bl32/tsp/
A Dtsp.ld.S101 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/bl2u/
A Dbl2u.ld.S104 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/bl2/
A Dbl2.ld.S102 __COHERENT_RAM_END__ = .; define
A Dbl2_el3.ld.S130 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/include/common/
A Dbl_common.h63 #define __COHERENT_RAM_END__ Load$$LR$$LR_COHERENT_RAM$$Limit macro
152 IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, BL_COHERENT_RAM_END);
/tf-a-ffa_el3_spmc/bl32/sp_min/
A Dsp_min.ld.S130 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/bl1/
A Dbl1.ld.S123 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/bl31/
A Dbl31.ld.S169 __COHERENT_RAM_END__ = .; define
/tf-a-ffa_el3_spmc/docs/design/
A Dfirmware-design.rst1604 - ``__COHERENT_RAM_END__`` Must be aligned on a page-size boundary.

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