Searched refs:__RW_START__ (Results 1 – 20 of 20) sorted by relevance
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/common/ble/ |
A D | ble.ld.S | 35 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/ |
A D | bl31.ld.S | 60 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/bl32/tsp/ |
A D | tsp.ld.S | 71 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/bl2u/aarch32/ |
A D | bl2u_entrypoint.S | 70 ldr r0, =__RW_START__
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/tf-a-ffa_el3_spmc/bl2u/aarch64/ |
A D | bl2u_entrypoint.S | 61 adr x0, __RW_START__
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/tf-a-ffa_el3_spmc/bl2u/ |
A D | bl2u.ld.S | 80 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/bl2/ |
A D | bl2.ld.S | 78 __RW_START__ = . ; define
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A D | bl2_el3.ld.S | 102 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/bl2/aarch32/ |
A D | bl2_entrypoint.S | 71 ldr r0, =__RW_START__
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/tf-a-ffa_el3_spmc/bl32/sp_min/ |
A D | sp_min.ld.S | 92 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/bl2/aarch64/ |
A D | bl2_entrypoint.S | 64 adr x0, __RW_START__
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/tf-a-ffa_el3_spmc/include/arch/aarch64/ |
A D | el3_common_macros.S | 397 adrp x0, __RW_START__ 398 add x0, x0, :lo12:__RW_START__
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/tf-a-ffa_el3_spmc/bl31/ |
A D | bl31.ld.S | 115 __RW_START__ = . ; define
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/tf-a-ffa_el3_spmc/plat/marvell/armada/common/aarch64/ |
A D | marvell_helpers.S | 226 adr x0, __RW_START__
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/tf-a-ffa_el3_spmc/include/arch/aarch32/ |
A D | el3_common_macros.S | 361 ldr r0, =__RW_START__
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/ |
A D | tegra_bl31_setup.c | 42 IMPORT_SYM(uint64_t, __RW_START__, BL31_RW_START);
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/tf-a-ffa_el3_spmc/include/common/ |
A D | bl_common.h | 88 #define __RW_START__ Load$$LR$$LR_RW_DATA$$Base macro
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/tf-a-ffa_el3_spmc/bl32/tsp/aarch64/ |
A D | tsp_entrypoint.S | 106 adr x0, __RW_START__
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/tf-a-ffa_el3_spmc/plat/imx/imx8qx/ |
A D | imx8qx_bl31_setup.c | 36 IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
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/tf-a-ffa_el3_spmc/plat/imx/imx8qm/ |
A D | imx8qm_bl31_setup.c | 36 IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
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