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Searched refs:__RW_START__ (Results 1 – 20 of 20) sorted by relevance

/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/common/ble/
A Dble.ld.S35 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/
A Dbl31.ld.S60 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/bl32/tsp/
A Dtsp.ld.S71 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/bl2u/aarch32/
A Dbl2u_entrypoint.S70 ldr r0, =__RW_START__
/tf-a-ffa_el3_spmc/bl2u/aarch64/
A Dbl2u_entrypoint.S61 adr x0, __RW_START__
/tf-a-ffa_el3_spmc/bl2u/
A Dbl2u.ld.S80 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/bl2/
A Dbl2.ld.S78 __RW_START__ = . ; define
A Dbl2_el3.ld.S102 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/bl2/aarch32/
A Dbl2_entrypoint.S71 ldr r0, =__RW_START__
/tf-a-ffa_el3_spmc/bl32/sp_min/
A Dsp_min.ld.S92 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/bl2/aarch64/
A Dbl2_entrypoint.S64 adr x0, __RW_START__
/tf-a-ffa_el3_spmc/include/arch/aarch64/
A Del3_common_macros.S397 adrp x0, __RW_START__
398 add x0, x0, :lo12:__RW_START__
/tf-a-ffa_el3_spmc/bl31/
A Dbl31.ld.S115 __RW_START__ = . ; define
/tf-a-ffa_el3_spmc/plat/marvell/armada/common/aarch64/
A Dmarvell_helpers.S226 adr x0, __RW_START__
/tf-a-ffa_el3_spmc/include/arch/aarch32/
A Del3_common_macros.S361 ldr r0, =__RW_START__
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/
A Dtegra_bl31_setup.c42 IMPORT_SYM(uint64_t, __RW_START__, BL31_RW_START);
/tf-a-ffa_el3_spmc/include/common/
A Dbl_common.h88 #define __RW_START__ Load$$LR$$LR_RW_DATA$$Base macro
/tf-a-ffa_el3_spmc/bl32/tsp/aarch64/
A Dtsp_entrypoint.S106 adr x0, __RW_START__
/tf-a-ffa_el3_spmc/plat/imx/imx8qx/
A Dimx8qx_bl31_setup.c36 IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
/tf-a-ffa_el3_spmc/plat/imx/imx8qm/
A Dimx8qm_bl31_setup.c36 IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);

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