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/tf-a-ffa_el3_spmc/plat/qemu/common/
A Dqemu_bl2_setup.c175 bl_mem_params->ep_info.args.arg3 = ARM_PRELOADED_DTB_BASE; in qemu_bl2_handle_post_image_load()
177 bl_mem_params->ep_info.args.arg0 = in qemu_bl2_handle_post_image_load()
178 bl_mem_params->ep_info.args.arg1; in qemu_bl2_handle_post_image_load()
179 bl_mem_params->ep_info.args.arg1 = 0; in qemu_bl2_handle_post_image_load()
180 bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE; in qemu_bl2_handle_post_image_load()
181 bl_mem_params->ep_info.args.arg3 = 0; in qemu_bl2_handle_post_image_load()
202 bl_mem_params->ep_info.args.arg0 = in qemu_bl2_handle_post_image_load()
204 bl_mem_params->ep_info.args.arg1 = 0U; in qemu_bl2_handle_post_image_load()
205 bl_mem_params->ep_info.args.arg2 = 0U; in qemu_bl2_handle_post_image_load()
206 bl_mem_params->ep_info.args.arg3 = 0U; in qemu_bl2_handle_post_image_load()
[all …]
/tf-a-ffa_el3_spmc/common/
A Dtf_log.c27 va_list args; in tf_log() local
47 va_start(args, fmt); in tf_log()
48 (void)vprintf(fmt + 1, args); in tf_log()
49 va_end(args); in tf_log()
A Ddesc_image_load.c278 params_node->ep_info->args.arg3 = fw_config_base; in populate_next_bl_params_config()
289 if (params_node->ep_info->args.arg1 == 0U) in populate_next_bl_params_config()
290 params_node->ep_info->args.arg1 = in populate_next_bl_params_config()
292 if (params_node->ep_info->args.arg2 == 0U) in populate_next_bl_params_config()
293 params_node->ep_info->args.arg2 = in populate_next_bl_params_config()
296 if (params_node->ep_info->args.arg0 == 0U) in populate_next_bl_params_config()
297 params_node->ep_info->args.arg0 = in populate_next_bl_params_config()
299 if (params_node->ep_info->args.arg1 == 0U) in populate_next_bl_params_config()
300 params_node->ep_info->args.arg1 = in populate_next_bl_params_config()
/tf-a-ffa_el3_spmc/plat/rpi/rpi3/
A Drpi3_bl31_setup.c122 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
123 bl33_image_ep_info.args.arg1 = ~0U; in bl31_early_platform_setup2()
124 bl33_image_ep_info.args.arg2 = (u_register_t) RPI3_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
133 bl33_image_ep_info.args.arg0 = (u_register_t) RPI3_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
134 bl33_image_ep_info.args.arg1 = 0ULL; in bl31_early_platform_setup2()
135 bl33_image_ep_info.args.arg2 = 0ULL; in bl31_early_platform_setup2()
136 bl33_image_ep_info.args.arg3 = 0ULL; in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/imx/imx7/common/
A Dimx7_bl2_el3_common.c86 bl_mem_params->ep_info.args.arg0 = in bl2_plat_handle_post_image_load()
87 bl_mem_params->ep_info.args.arg1; in bl2_plat_handle_post_image_load()
88 bl_mem_params->ep_info.args.arg1 = 0; in bl2_plat_handle_post_image_load()
90 bl_mem_params->ep_info.args.arg2 = in bl2_plat_handle_post_image_load()
93 bl_mem_params->ep_info.args.arg2 = 0; in bl2_plat_handle_post_image_load()
94 bl_mem_params->ep_info.args.arg3 = 0; in bl2_plat_handle_post_image_load()
105 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in bl2_plat_handle_post_image_load()
/tf-a-ffa_el3_spmc/plat/brcm/board/common/
A Dbcm_elog.c187 va_list args; in bcm_elog() local
208 va_start(args, fmt); in bcm_elog()
221 num = va_arg(args, int64_t); in bcm_elog()
223 num = va_arg(args, int32_t); in bcm_elog()
234 str = va_arg(args, char *); in bcm_elog()
239 unum = va_arg(args, uint64_t); in bcm_elog()
241 unum = va_arg(args, uint32_t); in bcm_elog()
251 unum = va_arg(args, uint64_t); in bcm_elog()
253 unum = va_arg(args, uint32_t); in bcm_elog()
267 va_end(args); in bcm_elog()
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_bl31_setup.c133 bl33_image_ep_info.args.arg0 = (u_register_t)PRELOADED_DTB_BASE; in brcm_bl31_early_platform_setup()
134 bl33_image_ep_info.args.arg1 = 0U; in brcm_bl31_early_platform_setup()
135 bl33_image_ep_info.args.arg2 = 0U; in brcm_bl31_early_platform_setup()
136 bl33_image_ep_info.args.arg3 = 0U; in brcm_bl31_early_platform_setup()
181 bl33_image_ep_info.args.arg0 = (u_register_t)BL33_SHARED_DDR_BASE; in brcm_bl31_early_platform_setup()
182 bl33_image_ep_info.args.arg1 = 0ULL; in brcm_bl31_early_platform_setup()
183 bl33_image_ep_info.args.arg2 = 0ULL; in brcm_bl31_early_platform_setup()
184 bl33_image_ep_info.args.arg3 = 0ULL; in brcm_bl31_early_platform_setup()
/tf-a-ffa_el3_spmc/lib/romlib/
A Dromlib_generator.py92 self.args = argparse.ArgumentParser(prog=prog, description=self.__doc__)
97 self.config = self.args.parse_args(argv)
128 self.args.add_argument("-o", "--output", help="Output file", metavar="output",
130 self.args.add_argument("--deps", help="Dependency file")
131 self.args.add_argument("file", help="Input file")
162 self.args.add_argument("-o", "--output", help="Output file", metavar="output",
164 self.args.add_argument("--bti", help="Branch Target Identification", type=int)
165 self.args.add_argument("file", help="Input file")
195 self.args.add_argument("--bti", help="Branch Target Identification", type=int)
197 self.args.add_argument("file", help="Input file")
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/tf-a-ffa_el3_spmc/services/spd/opteed/
A Dopteed_common.c56 zeromem(&optee_entry_point->args, sizeof(optee_entry_point->args)); in opteed_init_optee_ep_state()
57 optee_entry_point->args.arg0 = pageable_part; in opteed_init_optee_ep_state()
58 optee_entry_point->args.arg1 = mem_limit; in opteed_init_optee_ep_state()
59 optee_entry_point->args.arg2 = dt_addr; in opteed_init_optee_ep_state()
/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/
A Dbl31_plat_setup.c228 bl33_image_ep_info.args.arg4 = pmtk_bl_param->bootarg_loc; in bl31_early_platform_setup2()
357 next_image_info->args.arg0 = get_kernel_info_r0(); in bl31_plat_get_next_kernel64_ep_info()
358 next_image_info->args.arg1 = get_kernel_info_r1(); in bl31_plat_get_next_kernel64_ep_info()
362 next_image_info->args.arg0, in bl31_plat_get_next_kernel64_ep_info()
363 next_image_info->args.arg1); in bl31_plat_get_next_kernel64_ep_info()
401 next_image_info->args.arg0 = get_kernel_info_r0(); in bl31_plat_get_next_kernel32_ep_info()
402 next_image_info->args.arg1 = get_kernel_info_r1(); in bl31_plat_get_next_kernel32_ep_info()
403 next_image_info->args.arg2 = get_kernel_info_r2(); in bl31_plat_get_next_kernel32_ep_info()
407 next_image_info->args.arg0, in bl31_plat_get_next_kernel32_ep_info()
408 next_image_info->args.arg1, in bl31_plat_get_next_kernel32_ep_info()
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/tf-a-ffa_el3_spmc/lib/libc/
A Dprintf.c92 int vprintf(const char *fmt, va_list args) in vprintf() argument
116 num = get_num_va_args(args, l_count); in vprintf()
128 str = va_arg(args, char *); in vprintf()
132 unum = (uintptr_t)va_arg(args, void *); in vprintf()
142 unum = get_unum_va_args(args, l_count); in vprintf()
157 unum = get_unum_va_args(args, l_count); in vprintf()
A Dsnprintf.c104 int vsnprintf(char *s, size_t n, const char *fmt, va_list args) in vsnprintf() argument
165 num = va_arg(args, int); in vsnprintf()
179 str = va_arg(args, char *); in vsnprintf()
183 unum = va_arg(args, unsigned int); in vsnprintf()
188 unum = (uintptr_t)va_arg(args, void *); in vsnprintf()
199 unum = va_arg(args, unsigned int); in vsnprintf()
/tf-a-ffa_el3_spmc/plat/rpi/rpi4/
A Drpi4_bl31_setup.c153 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
154 bl33_image_ep_info.args.arg1 = ~0U; in bl31_early_platform_setup2()
155 bl33_image_ep_info.args.arg2 = rpi4_get_dtb_address(); in bl31_early_platform_setup2()
164 bl33_image_ep_info.args.arg0 = rpi4_get_dtb_address(); in bl31_early_platform_setup2()
165 bl33_image_ep_info.args.arg1 = 0ULL; in bl31_early_platform_setup2()
166 bl33_image_ep_info.args.arg2 = 0ULL; in bl31_early_platform_setup2()
167 bl33_image_ep_info.args.arg3 = 0ULL; in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/lib/optee/
A Doptee_utils.c177 header_ep->args.arg0 = MODE_RW_64; in parse_optee_header()
179 header_ep->args.arg0 = MODE_RW_32; in parse_optee_header()
215 header_ep->args.arg1 = paged_image_info->image_base; in parse_optee_header()
216 header_ep->args.arg2 = paged_image_info->image_size; in parse_optee_header()
220 header_ep->args.arg0 = MODE_RW_32; in parse_optee_header()
223 header_ep->args.arg0 = MODE_RW_64; in parse_optee_header()
/tf-a-ffa_el3_spmc/services/spd/trusty/
A Dtrusty.c91 struct smc_args args, ret_args; in trusty_context_switch() local
97 args.r7 = 0; in trusty_context_switch()
105 args.r6 = 0; in trusty_context_switch()
106 args.r5 = 0; in trusty_context_switch()
107 args.r4 = 0; in trusty_context_switch()
108 args.r3 = r3; in trusty_context_switch()
109 args.r2 = r2; in trusty_context_switch()
110 args.r1 = r1; in trusty_context_switch()
111 args.r0 = r0; in trusty_context_switch()
420 args->arg0 = TSP_SEC_MEM_SIZE; in plat_trusty_set_boot_args()
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/tf-a-ffa_el3_spmc/include/lib/libc/
A Dstdio.h24 int vprintf(const char *fmt, va_list args);
25 int vsnprintf(char *s, size_t n, const char *fmt, va_list args);
/tf-a-ffa_el3_spmc/docs/components/spd/
A Dtrusty-dispatcher.rst19 void plat_trusty_set_boot_args(aapcs64_params_t *args)
21 If this function is provided ``args->arg0`` must be set to the memory
24 will pass the memory size from ``TSP_SEC_MEM_SIZE``. ``args->arg1``
25 can be set to a platform specific parameter block, and ``args->arg2``
/tf-a-ffa_el3_spmc/plat/arm/common/
A Darm_bl31_setup.c135 bl32_image_ep_info.args.arg0 = ARM_TRUSTED_SRAM_BASE + in arm_bl31_early_platform_setup()
201 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; in arm_bl31_early_platform_setup()
202 bl33_image_ep_info.args.arg1 = 0U; in arm_bl31_early_platform_setup()
203 bl33_image_ep_info.args.arg2 = 0U; in arm_bl31_early_platform_setup()
204 bl33_image_ep_info.args.arg3 = 0U; in arm_bl31_early_platform_setup()
212 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_DRAM1_BASE; in arm_bl31_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/
A Dtegra_bl31_setup.c122 memcpy(&bl32_args, &arg_from_bl2->bl32_ep_info->args, sizeof(bl32_args)); in bl31_early_platform_setup2()
193 void plat_trusty_set_boot_args(aapcs64_params_t *args) in plat_trusty_set_boot_args() argument
201 args->arg0 = bl32_args.arg0; in plat_trusty_set_boot_args()
202 args->arg1 = bl32_args.arg2; in plat_trusty_set_boot_args()
205 args->arg2 = bl32_args.arg4; in plat_trusty_set_boot_args()
208 args->arg3 = bl32_args.arg5; in plat_trusty_set_boot_args()
/tf-a-ffa_el3_spmc/plat/renesas/common/
A Dbl2_plat_mem_params_desc.c56 .ep_info.args.arg3 = (uintptr_t)fdt_blob,
75 .ep_info.args.arg0 = RCAR_BL33_ARG0,
77 .ep_info.args.arg1 = (uintptr_t)fdt_blob,
/tf-a-ffa_el3_spmc/plat/arm/board/arm_fpga/
A Dfpga_bl31_setup.c60 bl33_image_ep_info.args.arg0 = (u_register_t)FPGA_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
61 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
62 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
63 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/ti/k3/common/
A Dk3_bl31_setup.c94 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; in bl31_early_platform_setup2()
95 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
96 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
97 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
/tf-a-ffa_el3_spmc/plat/intel/soc/common/
A Dsocfpga_sip_svc.c49 uint32_t args[3]; in intel_fpga_sdm_write_buffer() local
52 args[0] = (1<<8); in intel_fpga_sdm_write_buffer()
53 args[1] = buffer->addr + buffer->size_written; in intel_fpga_sdm_write_buffer()
55 args[2] = buffer->size - buffer->size_written; in intel_fpga_sdm_write_buffer()
59 args[2] = bytes_per_block; in intel_fpga_sdm_write_buffer()
61 buffer->size_written += args[2]; in intel_fpga_sdm_write_buffer()
62 mailbox_send_cmd_async(&send_id, MBOX_RECONFIG_DATA, args, in intel_fpga_sdm_write_buffer()
387 static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, uint32_t len, in intel_mbox_send_cmd() argument
395 if (!is_address_in_ddr_range((uint64_t)args, sizeof(uint32_t) * len)) in intel_mbox_send_cmd()
398 int status = mailbox_send_cmd(MBOX_JOB_ID, cmd, args, len, urgent, in intel_mbox_send_cmd()
/tf-a-ffa_el3_spmc/bl32/tsp/
A Dtsp_private.h55 #define read_sp_arg(args, offset) ((args)->_regs[offset >> 3]) argument
56 #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3]) \ argument
/tf-a-ffa_el3_spmc/plat/arm/common/sp_min/
A Darm_sp_min_setup.c96 bl33_image_ep_info.args.arg0 = 0U; in arm_sp_min_early_platform_setup()
97 bl33_image_ep_info.args.arg1 = ~0U; in arm_sp_min_early_platform_setup()
98 bl33_image_ep_info.args.arg2 = (u_register_t)ARM_PRELOADED_DTB_BASE; in arm_sp_min_early_platform_setup()

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