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/tf-a-ffa_el3_spmc/docs/plat/
A Ddeprecated.rst8 off period before deleting it or it can be deleted straight away. For later types
A Drz-g2.rst71 reference tree [1] resets into EL1 before entering BL2 - see its
74 BL2 initializes DDR before determining the boot reason (cold or warm).
A Drcar-gen3.rst71 reference tree [1] resets into EL1 before entering BL2 - see its
75 PMIC) before determining the boot reason (cold or warm).
A Drpi4.rst72 But before doing that, it will also load a "kernel" and the device tree into
A Dwarp7.rst21 BootROM will boot. It is therefore _required_ to build u-boot before TF-A and
/tf-a-ffa_el3_spmc/services/std_svc/sdei/
A Dsdei_main.c462 bool before, after; in sdei_event_enable() local
475 before = GET_EV_STATE(se, ENABLED); in sdei_event_enable()
484 if (is_map_bound(map) && (!before && after)) in sdei_event_enable()
502 bool before, after; in sdei_event_disable() local
515 before = GET_EV_STATE(se, ENABLED); in sdei_event_disable()
524 if (is_map_bound(map) && (before && !after)) in sdei_event_disable()
/tf-a-ffa_el3_spmc/docs/plat/arm/arm_fpga/
A Dindex.rst48 putting its address into the x0 register before jumping to the entry
50 It defaults to 0x80070000, which is 64KB before the BL33 load address.
56 To avoid random garbage, there needs to be a "CMD:" signature before the
/tf-a-ffa_el3_spmc/docs/components/
A Dplatform-interrupt-controller-API.rst90 inserts barrier to make memory updates visible before enabling interrupt, and
211 inserts barrier to make memory updates visible before raising SGI, then writes
252 inserts barrier to make memory updates visible before setting interrupt pending,
285 inserts to order memory updates before updating mask, then writes to the GIC
286 *Priority Mask Register*, and make sure memory updates are visible before
A Dexception-handling.rst387 priority level before returning to the |EHF|. Runtime firmware, upon exit
388 through an ``ERET``, resumes execution before the interrupt occurred.
424 priority before the call to ``ehf_activate_priority()``. Dispatchers
488 For the latter case above, dispatchers before |EHF| expect Non-secure interrupts
490 preempted error code before yielding to Non-secure world.
553 *deactivate* the priority level before returning to the |EHF|. See
574 was before.
A Darm-sip-service.rst68 This call can only be made on the primary CPU, before any secondaries were
74 registers should not be expected to hold their values before the call was made.
A Dxlat-tables-lib-v2-design.rst178 added early on, before the translation tables are created and populated. They
230 added before ``init_xlat_tables()`` is called and ``init_xlat_tables()`` must be
254 successfully added before updating the translation context structure. If the
390 is deferred to the ``enable_mmu*()`` family of functions, just before the MMU is
A Dffa-manifest-binding.rst99 must be booted before others. The partition with the smaller number will be
/tf-a-ffa_el3_spmc/docs/process/
A Dplatform-compatibility-policy.rst29 deprecated interfaces. Platforms are expected to migrate before the removal of
A Dsecurity.rst30 remedy before it is made public. As such, please follow the disclosure plan
A Dfaq.rst7 Often it is necessary to update your patch set before it is merged. Refer to the
A Dcode-review-guidelines.rst14 before they are integrated in the source tree. Different people bring different
53 several rounds of reviews and rework before they get approved, especially
/tf-a-ffa_el3_spmc/docs/security_advisories/
A Dsecurity-advisory-tfv-1.rst16 | Affected | firmware update code executing before BL31 |
43 the cold boot path, before BL31 starts. Untrusted in this sense means code
A Dsecurity-advisory-tfv-8.rst27 restore it before returning into the lower exception level software that called
A Dsecurity-advisory-tfv-4.rst17 | Affected | firmware update code executing before BL31 |
A Dsecurity-advisory-tfv-6.rst43 predictor as early as possible on entry into the secure world, before any branch
/tf-a-ffa_el3_spmc/docs/perf/
A Dpsci-performance-juno.rst54 test to complete before proceeding to the next non-lead CPU. The lead CPU then
107 the lock before proceeding.
140 AP CPU to enter WFI before making the channel available to other CPUs, which
/tf-a-ffa_el3_spmc/docs/threat_model/
A Dthreat_model.rst325 | | when the security check is produced before the time |
352 | | memory before authenticating an image. |
417 | | debugging problems before releasing the |
524 | | and arguments before using them. |
586 | | sanitized before being used. These security checks |
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dtools-build.rst41 It is recommended to remove old artifacts before building the tool:
A Drt-svc-writers-guide.rst154 performs basic validation of the declared service before calling
228 integer type before use, for example by ensuring that functions defined
/tf-a-ffa_el3_spmc/docs/design/
A Dfirmware-design.rst551 `SMC Calling Convention`_ before passing control to the required SMC
583 cluster immediately after reset and before the data cache is enabled in the
675 BL31 platform code before the caches are enabled.
784 accessed by AArch32 EL3 Runtime Software before the caches are enabled.
906 different providers and minimizing the time taken by the framework before the
1138 TF-A supports two approaches for the SPD to pass control to BL32 before
1354 #. allows any processor specific initialization before the caches and MMU
1592 - The BSS section must be zero-initialised before executing any C code.
1619 relocated from ROM to RAM before executing any C code.
1709 region and transferred to the SCP before being overwritten by EL3 Runtime
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