Searched refs:bit_pos (Results 1 – 9 of 9) sorted by relevance
| /tf-a-ffa_el3_spmc/drivers/nxp/sec_mon/ |
| A D | snvs.c | 137 void snvs_write_lp_gpr_bit(uint32_t offset, uint32_t bit_pos, bool flag_val) in snvs_write_lp_gpr_bit() argument
142 | (1 << bit_pos)); in snvs_write_lp_gpr_bit()
146 & ~(1 << bit_pos)); in snvs_write_lp_gpr_bit()
150 uint32_t snvs_read_lp_gpr_bit(uint32_t offset, uint32_t bit_pos) in snvs_read_lp_gpr_bit() argument
152 return (snvs_read32(g_nxp_snvs_addr + offset) & (1 << bit_pos)); in snvs_read_lp_gpr_bit()
163 void snvs_write_app_data_bit(uint32_t bit_pos) in snvs_write_app_data_bit() argument
166 bit_pos, in snvs_write_app_data_bit()
175 uint32_t snvs_read_app_data_bit(uint32_t bit_pos) in snvs_read_app_data_bit() argument
177 uint8_t ret = snvs_read_lp_gpr_bit(NXP_APP_DATA_LP_GPR_OFFSET, bit_pos); in snvs_read_app_data_bit()
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| /tf-a-ffa_el3_spmc/bl31/ |
| A D | interrupt_mgmt.c | 102 uint32_t flag, bit_pos; in set_scr_el3_from_rm() local
105 bit_pos = plat_interrupt_type_to_line(type, security_state); in set_scr_el3_from_rm()
106 intr_type_descs[type].scr_el3[security_state] = (u_register_t)flag << bit_pos; in set_scr_el3_from_rm()
114 cm_write_scr_el3_bit(security_state, bit_pos, flag); in set_scr_el3_from_rm()
151 uint32_t bit_pos, flag; in disable_intr_rm_local() local
157 bit_pos = plat_interrupt_type_to_line(type, security_state); in disable_intr_rm_local()
158 cm_write_scr_el3_bit(security_state, bit_pos, flag); in disable_intr_rm_local()
169 uint32_t bit_pos, flag; in enable_intr_rm_local() local
176 bit_pos = plat_interrupt_type_to_line(type, security_state); in enable_intr_rm_local()
177 cm_write_scr_el3_bit(security_state, bit_pos, flag); in enable_intr_rm_local()
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| /tf-a-ffa_el3_spmc/include/drivers/nxp/sec_mon/ |
| A D | snvs.h | 43 uint32_t snvs_read_lp_gpr_bit(uint32_t offset, uint32_t bit_pos);
44 void snvs_write_lp_gpr_bit(uint32_t offset, uint32_t bit_pos, bool flag_val);
50 uint32_t snvs_read_app_data_bit(uint32_t bit_pos);
52 void snvs_write_app_data_bit(uint32_t bit_pos);
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| /tf-a-ffa_el3_spmc/drivers/arm/ccn/ |
| A D | ccn_private.h | 169 #define FOR_EACH_BIT(bit_pos, bit_map) \ argument
170 for (bit_pos = __builtin_ctzll(bit_map); \
172 bit_map &= ~(1ULL << (bit_pos)), \
173 bit_pos = __builtin_ctzll(bit_map))
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| /tf-a-ffa_el3_spmc/include/lib/el3_runtime/ |
| A D | context_mgmt.h | 50 uint32_t bit_pos,
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| /tf-a-ffa_el3_spmc/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 734 uint32_t bit_pos, in cm_write_scr_el3_bit() argument
745 assert(((1UL << bit_pos) & SCR_VALID_BIT_MASK) != 0U); in cm_write_scr_el3_bit()
756 scr_el3 &= ~(1UL << bit_pos); in cm_write_scr_el3_bit()
757 scr_el3 |= (u_register_t)value << bit_pos; in cm_write_scr_el3_bit()
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/avs/ |
| A D | avs_driver.c | 156 static void avs_poll(uint8_t bit_pos, uint8_t val);
616 static void avs_poll(uint8_t bit_pos, uint8_t val) in avs_poll() argument
621 bit_val = bit_pos; in avs_poll()
624 if ((mmio_read_8(IIC_ICSR) & bit_pos) == bit_val) in avs_poll()
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| /tf-a-ffa_el3_spmc/docs/process/ |
| A D | coding-style.rst | 233 uint32_t flag, bit_pos;
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| /tf-a-ffa_el3_spmc/docs/design/ |
| A D | interrupt-framework-design.rst | 382 uint32_t bit_pos,
387 to the bit specified by ``bit_pos``. ``register_interrupt_type_handler()`` invokes
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