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Searched refs:bl31_get_plat_params (Results 1 – 11 of 11) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t210/
A Dplat_setup.c165 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in plat_early_platform_setup()
204 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in plat_late_platform_setup()
281 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in plat_supports_system_suspend()
A Dplat_psci_handlers.c47 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in tegra_soc_validate_power_state()
347 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in tegra_soc_pwr_domain_power_down_wfi()
435 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in tegra_soc_pwr_domain_on_finish()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/
A Dplat_secondary.c32 plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in plat_secondary_setup()
A Dplat_psci_handlers.c118 plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in tegra_soc_pwr_domain_suspend()
267 plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in tegra_soc_pwr_domain_power_down_wfi()
346 const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in tegra_soc_pwr_domain_on_finish()
A Dplat_setup.c242 const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in plat_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/
A Dtegra_bl31_setup.c82 plat_params_from_bl2_t *bl31_get_plat_params(void) in bl31_get_plat_params() function
280 const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in bl31_plat_arch_setup()
A Dtegra_pm.c183 plat_params = bl31_get_plat_params(); in tegra_pwr_domain_on_finish()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/
A Dplat_psci_handlers.c106 const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in tegra_soc_pwr_domain_suspend()
283 const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in tegra_soc_pwr_domain_power_down_wfi()
376 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in tegra_soc_pwr_domain_on_finish()
A Dplat_setup.c189 const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); in plat_early_platform_setup()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/
A Dtegra_private.h127 plat_params_from_bl2_t *bl31_get_plat_params(void);
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/drivers/memctrl/
A Dmemctrl_v2.c123 const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); in tegra_mc_save_context()

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