| /tf-a-ffa_el3_spmc/plat/brcm/common/ |
| A D | brcm_bl31_setup.c | 30 static entry_point_info_t bl33_image_ep_info; variable
65 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
113 SET_PARAM_HEAD(&bl33_image_ep_info, in brcm_bl31_early_platform_setup()
134 bl33_image_ep_info.args.arg1 = 0U; in brcm_bl31_early_platform_setup()
135 bl33_image_ep_info.args.arg2 = 0U; in brcm_bl31_early_platform_setup()
136 bl33_image_ep_info.args.arg3 = 0U; in brcm_bl31_early_platform_setup()
170 bl33_image_ep_info = *bl_params->ep_info; in brcm_bl31_early_platform_setup()
175 if (bl33_image_ep_info.pc == 0U) in brcm_bl31_early_platform_setup()
182 bl33_image_ep_info.args.arg1 = 0ULL; in brcm_bl31_early_platform_setup()
183 bl33_image_ep_info.args.arg2 = 0ULL; in brcm_bl31_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/rpi/rpi3/ |
| A D | rpi3_bl31_setup.c | 25 static entry_point_info_t bl33_image_ep_info; variable
40 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
102 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
108 if (bl33_image_ep_info.pc == 0) { in bl31_early_platform_setup2()
122 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
123 bl33_image_ep_info.args.arg1 = ~0U; in bl31_early_platform_setup2()
124 bl33_image_ep_info.args.arg2 = (u_register_t) RPI3_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
133 bl33_image_ep_info.args.arg0 = (u_register_t) RPI3_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
134 bl33_image_ep_info.args.arg1 = 0ULL; in bl31_early_platform_setup2()
135 bl33_image_ep_info.args.arg2 = 0ULL; in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/arm/common/sp_min/ |
| A D | arm_sp_min_setup.c | 19 static entry_point_info_t bl33_image_ep_info; variable
49 next_image_info = &bl33_image_ep_info; in sp_min_plat_get_bl33_ep_info()
76 SET_PARAM_HEAD(&bl33_image_ep_info, in arm_sp_min_early_platform_setup()
84 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in arm_sp_min_early_platform_setup()
85 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); in arm_sp_min_early_platform_setup()
86 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_sp_min_early_platform_setup()
96 bl33_image_ep_info.args.arg0 = 0U; in arm_sp_min_early_platform_setup()
97 bl33_image_ep_info.args.arg1 = ~0U; in arm_sp_min_early_platform_setup()
98 bl33_image_ep_info.args.arg2 = (u_register_t)ARM_PRELOADED_DTB_BASE; in arm_sp_min_early_platform_setup()
119 bl33_image_ep_info = *bl_params->ep_info; in arm_sp_min_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/rpi/rpi4/ |
| A D | rpi4_bl31_setup.c | 47 static entry_point_info_t bl33_image_ep_info; variable
62 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
139 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_early_platform_setup2()
140 bl33_image_ep_info.spsr = rpi3_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
153 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
154 bl33_image_ep_info.args.arg1 = ~0U; in bl31_early_platform_setup2()
155 bl33_image_ep_info.args.arg2 = rpi4_get_dtb_address(); in bl31_early_platform_setup2()
164 bl33_image_ep_info.args.arg0 = rpi4_get_dtb_address(); in bl31_early_platform_setup2()
165 bl33_image_ep_info.args.arg1 = 0ULL; in bl31_early_platform_setup2()
166 bl33_image_ep_info.args.arg2 = 0ULL; in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/arm/common/ |
| A D | arm_bl31_setup.c | 31 static entry_point_info_t bl33_image_ep_info; variable
88 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
142 SET_PARAM_HEAD(&bl33_image_ep_info, in arm_bl31_early_platform_setup()
150 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in arm_bl31_early_platform_setup()
152 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); in arm_bl31_early_platform_setup()
153 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_bl31_early_platform_setup()
184 bl33_image_ep_info = *bl_params->ep_info; in arm_bl31_early_platform_setup()
189 if (bl33_image_ep_info.pc == 0U) in arm_bl31_early_platform_setup()
202 bl33_image_ep_info.args.arg1 = 0U; in arm_bl31_early_platform_setup()
203 bl33_image_ep_info.args.arg2 = 0U; in arm_bl31_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/qti/common/src/ |
| A D | qti_bl31_setup.c | 29 static entry_point_info_t bl33_image_ep_info; variable
79 bl31_params_parse_helper(from_bl2, NULL, &bl33_image_ep_info); in bl31_early_platform_setup()
130 assert(bl33_image_ep_info.h.type == PARAM_EP); in bl31_plat_get_next_image_ep_info()
131 assert(bl33_image_ep_info.h.attr == NON_SECURE); in bl31_plat_get_next_image_ep_info()
136 if (bl33_image_ep_info.pc) { in bl31_plat_get_next_image_ep_info()
137 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/ti/k3/common/ |
| A D | k3_bl31_setup.c | 38 static entry_point_info_t bl33_image_ep_info; variable
82 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
83 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; in bl31_early_platform_setup2()
84 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
85 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
94 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; in bl31_early_platform_setup2()
95 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
96 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
97 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
186 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/poplar/ |
| A D | bl31_plat_setup.c | 31 static entry_point_info_t bl33_image_ep_info; variable
45 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
97 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
102 if (bl33_image_ep_info.pc == 0) in bl31_early_platform_setup2()
134 bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2); in bl31_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/arm/board/arm_fpga/ |
| A D | fpga_bl31_setup.c | 22 static entry_point_info_t bl33_image_ep_info; variable
55 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_early_platform_setup2()
56 bl33_image_ep_info.spsr = fpga_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
57 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
60 bl33_image_ep_info.args.arg0 = (u_register_t)FPGA_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
61 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
62 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
63 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
108 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/layerscape/common/ |
| A D | ls_bl31_setup.c | 24 static entry_point_info_t bl33_image_ep_info; variable
51 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
92 SET_PARAM_HEAD(&bl33_image_ep_info, in ls_bl31_early_platform_setup()
100 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in ls_bl31_early_platform_setup()
102 bl33_image_ep_info.spsr = ls_get_spsr_for_bl33_entry(); in ls_bl31_early_platform_setup()
103 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in ls_bl31_early_platform_setup()
135 bl33_image_ep_info = *bl_params->ep_info; in ls_bl31_early_platform_setup()
140 if (bl33_image_ep_info.pc == 0) in ls_bl31_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/marvell/armada/common/ |
| A D | marvell_bl31_setup.c | 28 static entry_point_info_t bl33_image_ep_info; variable
50 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
89 SET_PARAM_HEAD(&bl33_image_ep_info, in marvell_bl31_early_platform_setup()
97 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in marvell_bl31_early_platform_setup()
98 bl33_image_ep_info.spsr = marvell_get_spsr_for_bl33_entry(); in marvell_bl31_early_platform_setup()
99 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in marvell_bl31_early_platform_setup()
129 bl33_image_ep_info = *bl_params->ep_info; in marvell_bl31_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/xilinx/versal/ |
| A D | bl31_versal_setup.c | 25 static entry_point_info_t bl33_image_ep_info; variable
38 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
51 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_set_default_config()
52 bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_set_default_config()
103 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
104 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
108 &bl33_image_ep_info, in bl31_early_platform_setup2()
117 NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/ |
| A D | imx8mm_bl31_setup.c | 58 static entry_point_info_t bl33_image_ep_info; variable
123 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
124 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
125 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
135 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
136 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
176 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mn/ |
| A D | imx8mn_bl31_setup.c | 58 static entry_point_info_t bl33_image_ep_info; variable
123 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
124 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
125 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
135 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
136 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
176 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mp/ |
| A D | imx8mp_bl31_setup.c | 56 static entry_point_info_t bl33_image_ep_info; variable
121 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
122 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
123 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
133 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
134 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
174 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/ |
| A D | bl31_zynqmp_setup.c | 28 static entry_point_info_t bl33_image_ep_info; variable
41 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
55 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_set_default_config()
56 bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_set_default_config()
104 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
105 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
114 &bl33_image_ep_info, in bl31_early_platform_setup2()
125 if (bl33_image_ep_info.pc) { in bl31_early_platform_setup2()
126 VERBOSE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/allwinner/common/ |
| A D | sunxi_bl31_setup.c | 31 static entry_point_info_t bl33_image_ep_info; variable
96 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
101 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; in bl31_early_platform_setup2()
102 bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_early_platform_setup2()
104 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
193 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/qemu/common/ |
| A D | qemu_bl31_setup.c | 20 static entry_point_info_t bl33_image_ep_info; variable
56 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
61 if (!bl33_image_ep_info.pc) in bl31_early_platform_setup2()
104 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/socionext/uniphier/ |
| A D | uniphier_bl31_setup.c | 22 static entry_point_info_t bl33_image_ep_info; variable
28 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
51 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
56 if (bl33_image_ep_info.pc == 0) in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mq/ |
| A D | imx8mq_bl31_setup.c | 47 static entry_point_info_t bl33_image_ep_info; variable
145 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
146 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
147 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
157 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
158 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
202 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /tf-a-ffa_el3_spmc/plat/socionext/synquacer/ |
| A D | sq_bl31_setup.c | 21 static entry_point_info_t bl33_image_ep_info; variable
30 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
106 SET_PARAM_HEAD(&bl33_image_ep_info, in bl31_early_platform_setup2()
114 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; in bl31_early_platform_setup2()
115 bl33_image_ep_info.spsr = sq_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
116 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt6795/ |
| A D | bl31_plat_setup.c | 47 static entry_point_info_t bl33_image_ep_info; variable
160 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
217 SET_PARAM_HEAD(&bl33_image_ep_info, in bl31_early_platform_setup2()
226 bl33_image_ep_info.pc = pmtk_bl_param->bl33_start_addr; in bl31_early_platform_setup2()
227 bl33_image_ep_info.spsr = plat_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
228 bl33_image_ep_info.args.arg4 = pmtk_bl_param->bootarg_loc; in bl31_early_platform_setup2()
229 bl33_image_ep_info.args.arg5 = pmtk_bl_param->bootarg_size; in bl31_early_platform_setup2()
230 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
342 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_kernel64_ep_info()
386 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_kernel32_ep_info()
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| /tf-a-ffa_el3_spmc/plat/amlogic/gxbb/ |
| A D | gxbb_bl31_setup.c | 21 static entry_point_info_t bl33_image_ep_info; variable
35 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
88 bl33_image_ep_info = *from_bl2->bl33_ep_info; in bl31_early_platform_setup2()
90 if (bl33_image_ep_info.pc == 0U) { in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/nxp/common/setup/ |
| A D | ls_bl31_setup.c | 28 static entry_point_info_t bl33_image_ep_info; variable
61 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
102 bl33_image_ep_info.pc = _get_test_entry(); in bl31_early_platform_setup2()
149 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
156 if (bl33_image_ep_info.pc == 0) { in bl31_early_platform_setup2()
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| /tf-a-ffa_el3_spmc/plat/intel/soc/agilex/ |
| A D | bl31_plat_setup.c | 21 static entry_point_info_t bl33_image_ep_info; variable
28 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
66 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
78 bl33_image_ep_info = *arg_from_bl2->bl33_ep_info; in bl31_early_platform_setup2()
80 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
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