| /tf-a-ffa_el3_spmc/drivers/nxp/ddr/nxp-ddr/ |
| A D | regs.c | 20 const unsigned int mclk_ps = get_memory_clk_ps(clk); in cal_cwl()
108 int trwt_mclk = (clk / 1000000 > 1900) ? 3 : 2; in cal_timing_cfg()
128 const int refrec_ctrl = picos_to_mclk(clk, in cal_timing_cfg()
136 const int wr_lat = cal_cwl(clk); in cal_timing_cfg()
137 int rd_to_pre = picos_to_mclk(clk, 7500); in cal_timing_cfg()
145 picos_to_mclk(clk, popts->tfaw_ps); in cal_timing_cfg()
178 picos_to_mclk(clk, in cal_timing_cfg()
360 const unsigned int freq = clk / 1000000U; in cal_ddr_sdram_rcw()
572 unsigned int cwl = cal_cwl(clk); in cal_ddr_sdram_mode()
584 picos_to_mclk(clk, pdimm->tccdl_ps)); in cal_ddr_sdram_mode()
[all …]
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| A D | ddr.c | 261 static int cal_odt(const unsigned int clk, in cal_odt() argument
322 static int cal_opts(const unsigned int clk, in cal_opts() argument
374 popts->bstopre = picos_to_mclk(clk, pdimm->refresh_rate_ps) >> 2; in cal_opts()
435 const unsigned long speed = priv->clk / 1000000; in cal_board_params()
477 ret = cal_odt(priv->clk, in synthesize_ctlr()
486 ret = cal_opts(priv->clk, in synthesize_ctlr()
804 ret = compute_ddrc(priv->clk, in cal_ddrc_regs()
825 ret = ddrc_set_regs(priv->clk, &priv->ddr_reg, priv->ddr[i], 0); in write_ddrc_regs()
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| A D | ddrc.c | 188 int ddrc_set_regs(const unsigned long clk, in ddrc_set_regs() argument
362 ddr_freq = clk / 1000000U; in ddrc_set_regs()
378 ddr_freq = clk / 1000000U; in ddrc_set_regs()
479 (clk >> 20)) << 2; in ddrc_set_regs()
587 100 / (clk >> 20)) * 10; in ddrc_set_regs()
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| /tf-a-ffa_el3_spmc/drivers/imx/usdhc/ |
| A D | imx_usdhc.c | 22 static int imx_usdhc_set_ios(unsigned int clk, unsigned int width);
39 static void imx_usdhc_set_clk(int clk) in imx_usdhc_set_clk() argument
46 assert(clk > 0); in imx_usdhc_set_clk()
48 while (sdhc_clk / (16 * pre_div) > clk && pre_div < 256) in imx_usdhc_set_clk()
51 while (sdhc_clk / div > clk && div < 16) in imx_usdhc_set_clk()
56 clk = (pre_div << 8) | (div << 4); in imx_usdhc_set_clk()
59 mmio_clrsetbits32(reg_base + SYSCTRL, SYSCTRL_CLOCK_MASK, clk); in imx_usdhc_set_clk()
252 static int imx_usdhc_set_ios(unsigned int clk, unsigned int width) in imx_usdhc_set_ios() argument
256 imx_usdhc_set_clk(clk); in imx_usdhc_set_ios()
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| /tf-a-ffa_el3_spmc/plat/intel/soc/common/include/ |
| A D | socfpga_private.h | 14 #define EMMC_INIT_PARAMS(base, clk) \ argument
16 .clk_rate = (clk), \
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| /tf-a-ffa_el3_spmc/plat/imx/common/include/sci/svc/pm/ |
| A D | sci_pm_api.h | 454 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
475 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
503 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
527 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
548 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
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| /tf-a-ffa_el3_spmc/include/drivers/nxp/ddr/ |
| A D | ddr.h | 89 unsigned long clk; member
128 int compute_ddrc(const unsigned long clk,
135 int ddrc_set_regs(const unsigned long clk,
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| A D | utility.h | 19 unsigned int get_memory_clk_ps(unsigned long clk);
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/ddr/ddr_b/ |
| A D | boot_init_dram_config.c | 1770 void boardcnf_get_brd_clk(uint32_t brd, uint32_t *clk, uint32_t *div) in boardcnf_get_brd_clk() argument
1775 *clk = 50; in boardcnf_get_brd_clk()
1781 *clk = 50; in boardcnf_get_brd_clk()
1785 *clk = 60; in boardcnf_get_brd_clk()
1789 *clk = 75; in boardcnf_get_brd_clk()
1793 *clk = 100; in boardcnf_get_brd_clk()
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| /tf-a-ffa_el3_spmc/plat/imx/common/sci/svc/pm/ |
| A D | pm_rpc_clnt.c | 236 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate) in sc_pm_set_clock_rate() argument
246 RPC_U8(&msg, 6U) = (uint8_t)clk; in sc_pm_set_clock_rate()
257 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate) in sc_pm_get_clock_rate() argument
266 RPC_U8(&msg, 2U) = (uint8_t)clk; in sc_pm_get_clock_rate()
280 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog) in sc_pm_clock_enable() argument
289 RPC_U8(&msg, 2U) = (uint8_t)clk; in sc_pm_clock_enable()
301 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent() argument
310 RPC_U8(&msg, 2U) = (uint8_t)clk; in sc_pm_set_clock_parent()
321 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent() argument
330 RPC_U8(&msg, 2U) = (uint8_t)clk; in sc_pm_get_clock_parent()
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| /tf-a-ffa_el3_spmc/drivers/synopsys/emmc/ |
| A D | dw_mmc.c | 125 static int dw_set_ios(unsigned int clk, unsigned int width);
157 static void dw_set_clk(int clk) in dw_set_clk() argument
162 assert(clk > 0); in dw_set_clk()
165 if ((dw_params.clk_rate / (2 * div)) <= clk) { in dw_set_clk()
322 static int dw_set_ios(unsigned int clk, unsigned int width) in dw_set_ios() argument
338 dw_set_clk(clk); in dw_set_ios()
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| /tf-a-ffa_el3_spmc/plat/st/stm32mp1/ |
| A D | stm32mp1_scmi.c | 453 struct stm32_scmi_clk *clk = &res->clock[j]; in stm32mp1_init_scmi_server() local
455 if ((clk->name == NULL) || in stm32mp1_init_scmi_server()
456 (strlen(clk->name) >= SCMI_CLOCK_NAME_SIZE)) { in stm32mp1_init_scmi_server()
462 if (clk->enabled && in stm32mp1_init_scmi_server()
463 stm32mp_nsec_can_access_clock(clk->clock_id)) { in stm32mp1_init_scmi_server()
464 stm32mp_clk_enable(clk->clock_id); in stm32mp1_init_scmi_server()
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| /tf-a-ffa_el3_spmc/drivers/st/gpio/ |
| A D | stm32_gpio.c | 103 int clk; in dt_set_gpio_config() local
140 clk = fdt_get_clock_id(bank_node); in dt_set_gpio_config()
141 if (clk < 0) { in dt_set_gpio_config()
146 assert((unsigned long)clk == stm32_get_gpio_bank_clock(bank)); in dt_set_gpio_config()
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| /tf-a-ffa_el3_spmc/drivers/rpi3/sdhost/ |
| A D | rpi3_sdhost.c | 22 static int rpi3_sdhost_set_ios(unsigned int clk, unsigned int width);
393 static int rpi3_sdhost_set_clock(unsigned int clk) in rpi3_sdhost_set_clock() argument
399 if (clk < 100000) { in rpi3_sdhost_set_clock()
405 div = max_clk / clk; in rpi3_sdhost_set_clock()
409 if ((max_clk / div) > clk) in rpi3_sdhost_set_clock()
425 static int rpi3_sdhost_set_ios(unsigned int clk, unsigned int width) in rpi3_sdhost_set_ios() argument
430 rpi3_sdhost_set_clock(clk); in rpi3_sdhost_set_ios()
431 VERBOSE("rpi3_sdhost: Changing clock to %dHz for data mode\n", clk); in rpi3_sdhost_set_ios()
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| /tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2160ardb/ |
| A D | ddr_init.c | 190 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
193 if (info.clk == 0) { in init_ddr()
194 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
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| /tf-a-ffa_el3_spmc/drivers/mmc/ |
| A D | mmc.c | 223 static int mmc_set_ios(unsigned int clk, unsigned int bus_width) in mmc_set_ios() argument
247 return ops->set_ios(clk, width); in mmc_set_ios()
448 static int mmc_enumerate(unsigned int clk, unsigned int bus_width) in mmc_enumerate() argument
522 ret = mmc_set_ios(clk, bus_width); in mmc_enumerate()
787 int mmc_init(const struct mmc_ops *ops_ptr, unsigned int clk, in mmc_init() argument
799 (clk != 0) && in mmc_init()
810 return mmc_enumerate(clk, width); in mmc_init()
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| /tf-a-ffa_el3_spmc/include/drivers/ |
| A D | mmc.h | 130 int (*set_ios)(unsigned int clk, unsigned int width);
240 int mmc_init(const struct mmc_ops *ops_ptr, unsigned int clk,
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| /tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2160aqds/ |
| A D | ddr_init.c | 325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
328 if (info.clk == 0) { in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
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| /tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2162aqds/ |
| A D | ddr_init.c | 325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
328 if (info.clk == 0) { in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
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| /tf-a-ffa_el3_spmc/fdts/ |
| A D | stm32mp151.dtsi | 39 clk_hse: clk-hse {
45 clk_hsi: clk-hsi {
51 clk_lse: clk-lse {
57 clk_lsi: clk-lsi {
63 clk_csi: clk-csi {
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| A D | stm32mp15-pinctrl.dtsi | 44 qspi_clk_pins_a: qspi-clk-0 {
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| A D | tc.dts | 331 fake_hdlcd_clk: fake-hdlcd-clk {
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| /tf-a-ffa_el3_spmc/drivers/st/mmc/ |
| A D | stm32_sdmmc2.c | 125 static int stm32_sdmmc2_set_ios(unsigned int clk, unsigned int width);
416 static int stm32_sdmmc2_set_ios(unsigned int clk, unsigned int width) in stm32_sdmmc2_set_ios() argument
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| /tf-a-ffa_el3_spmc/drivers/nxp/ddr/phy-gen2/ |
| A D | phy.c | 2462 const unsigned long clk = priv->clk; in compute_ddr_phy() local
2500 input.basic.frequency = (int) (clk / 2000000ul); in compute_ddr_phy()
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| /tf-a-ffa_el3_spmc/docs/plat/ |
| A D | rpi3.rst | 451 [ 0.266484] bcm2835-aux-uart 3f215040.serial: could not get clk: -517
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