| /tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/mcdi/ |
| A D | mtk_mcdi.c | 38 void sspm_standbywfi_irq_enable(uint32_t cpu_idx) in sspm_standbywfi_irq_enable() argument
96 if (cpu_idx >= 0) in target_mask()
97 t |= BIT(cpu_idx + CPU_ON_OFS); in target_mask()
102 if (cpu_idx >= 0) in target_mask()
103 t |= BIT(cpu_idx + CPU_OFF_OFS); in target_mask()
111 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_clr()
120 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_set()
122 uint32_t tgtn = target_mask(-1, cpu_idx, !on); in mcdi_pause_set()
157 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_hotplug_wait_ack()
168 uint32_t tgt_cpu = target_mask(-1, cpu_idx, on); in mcdi_hotplug_clr()
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| A D | mtk_mcdi.h | 13 void sspm_standbywfi_irq_enable(uint32_t cpu_idx);
25 void mcdi_pause_set(int cluster, int cpu_idx, bool on);
26 void mcdi_pause_clr(int cluster, int cpu_idx, bool on);
27 void mcdi_hotplug_set(int cluster, int cpu_idx, bool on);
28 void mcdi_hotplug_clr(int cluster, int cpu_idx, bool on);
29 void mcdi_hotplug_wait_ack(int cluster, int cpu_idx, bool on);
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| /tf-a-ffa_el3_spmc/bl31/ |
| A D | bl31_context_mgmt.c | 44 void *cm_get_context_by_index(unsigned int cpu_idx, in cm_get_context_by_index() argument
49 return get_cpu_data_by_index(cpu_idx, cpu_context[security_state]); in cm_get_context_by_index()
56 void cm_set_context_by_index(unsigned int cpu_idx, void *context, in cm_set_context_by_index() argument
61 set_cpu_data_by_index(cpu_idx, cpu_context[security_state], context); in cm_set_context_by_index()
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| /tf-a-ffa_el3_spmc/lib/psci/ |
| A D | psci_common.c | 166 for (cpu_idx = 0; cpu_idx < psci_plat_core_count; in psci_is_last_on_cpu()
167 cpu_idx++) { in psci_is_last_on_cpu()
168 if (cpu_idx == my_idx) { in psci_is_last_on_cpu()
208 unsigned int cpu_idx, in psci_set_req_local_pwr_state() argument
213 (cpu_idx < psci_plat_core_count)) { in psci_set_req_local_pwr_state()
244 unsigned int cpu_idx) in psci_get_req_local_pwr_states() argument
249 (cpu_idx < psci_plat_core_count)) { in psci_get_req_local_pwr_states()
388 cpu_idx, in psci_set_pwr_domains_to_run()
436 psci_set_req_local_pwr_state(lvl, cpu_idx, in psci_do_state_coordination()
772 unsigned int cpu_idx = plat_my_core_pos(); in psci_warmboot_entrypoint() local
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| A D | psci_stat.c | 80 unsigned int cpu_idx = plat_my_core_pos(); in psci_stats_update_pwr_down() local
85 parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node; in psci_stats_update_pwr_down()
97 last_cpu_in_non_cpu_pd[parent_idx] = (int)cpu_idx; in psci_stats_update_pwr_down()
113 unsigned int cpu_idx = plat_my_core_pos(); in psci_stats_update_pwr_up() local
127 state_info, cpu_idx); in psci_stats_update_pwr_up()
130 psci_cpu_stat[cpu_idx][stat_idx].residency += residency; in psci_stats_update_pwr_up()
131 psci_cpu_stat[cpu_idx][stat_idx].count++; in psci_stats_update_pwr_up()
137 parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node; in psci_stats_update_pwr_up()
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| A D | psci_on.c | 169 void psci_cpu_on_finish(unsigned int cpu_idx, const psci_power_state_t *state_info) in psci_cpu_on_finish() argument
207 psci_spin_lock_cpu(cpu_idx); in psci_cpu_on_finish()
208 psci_spin_unlock_cpu(cpu_idx); in psci_cpu_on_finish()
225 psci_cpu_pd_nodes[cpu_idx].mpidr = read_mpidr() & MPIDR_AFFINITY_MASK; in psci_cpu_on_finish()
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| A D | psci_setup.c | 97 unsigned int cpu_idx; in psci_update_pwrlvl_limits() local
102 for (cpu_idx = 0; cpu_idx < psci_plat_core_count; cpu_idx++) { in psci_update_pwrlvl_limits()
103 psci_get_parent_pwr_domain_nodes(cpu_idx, in psci_update_pwrlvl_limits()
110 = cpu_idx; in psci_update_pwrlvl_limits()
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| A D | psci_suspend.c | 28 static void psci_suspend_to_standby_finisher(unsigned int cpu_idx, in psci_suspend_to_standby_finisher() argument
35 psci_get_parent_pwr_domain_nodes(cpu_idx, end_pwrlvl, parent_nodes); in psci_suspend_to_standby_finisher()
279 void psci_cpu_suspend_finish(unsigned int cpu_idx, const psci_power_state_t *state_info) in psci_cpu_suspend_finish() argument
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| A D | psci_private.h | 279 void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
309 void psci_cpu_on_finish(unsigned int cpu_idx, const psci_power_state_t *state_info);
320 void psci_cpu_suspend_finish(unsigned int cpu_idx, const psci_power_state_t *state_info);
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| /tf-a-ffa_el3_spmc/include/lib/el3_runtime/ |
| A D | context_mgmt.h | 25 void *cm_get_context_by_index(unsigned int cpu_idx,
27 void cm_set_context_by_index(unsigned int cpu_idx,
33 void cm_init_context_by_index(unsigned int cpu_idx,
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| /tf-a-ffa_el3_spmc/bl32/sp_min/ |
| A D | sp_min_main.c | 91 void *cm_get_context_by_index(unsigned int cpu_idx, in cm_get_context_by_index() argument
95 return sp_min_cpu_ctx_ptr[cpu_idx]; in cm_get_context_by_index()
102 void cm_set_context_by_index(unsigned int cpu_idx, void *context, in cm_set_context_by_index() argument
106 sp_min_cpu_ctx_ptr[cpu_idx] = context; in cm_set_context_by_index()
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| /tf-a-ffa_el3_spmc/drivers/arm/css/scp/ |
| A D | css_pm_scmi.c | 249 unsigned int channel_id, cpu_idx, domain_id; in css_scp_get_power_state() local
259 cpu_idx = (unsigned int)plat_core_pos_by_mpidr(mpidr); in css_scp_get_power_state()
260 assert(cpu_idx < PLATFORM_CORE_COUNT); in css_scp_get_power_state()
262 css_scp_core_pos_to_scmi_channel(cpu_idx, &domain_id, &channel_id); in css_scp_get_power_state()
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| /tf-a-ffa_el3_spmc/lib/el3_runtime/aarch32/ |
| A D | context_mgmt.c | 147 void cm_init_context_by_index(unsigned int cpu_idx, in cm_init_context_by_index() argument
151 ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr)); in cm_init_context_by_index()
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| /tf-a-ffa_el3_spmc/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 371 void cm_init_context_by_index(unsigned int cpu_idx, in cm_init_context_by_index() argument
375 ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr)); in cm_init_context_by_index()
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| /tf-a-ffa_el3_spmc/docs/getting_started/ |
| A D | psci-lib-integration-guide.rst | 364 Argument : unsigned int cpu_idx, void *context, unsigned int security_state
372 by ``cpu_idx`` (first argument). The ``security_state`` will always be non-secure
374 with BL31. The ``cpu_idx`` will correspond to the index returned by the
399 Argument : unsigned int cpu_idx, unsigned int security_state
404 ``cpu_idx`` (first argument). The caller must ensure that
408 retained for compatibility with BL31. The ``cpu_idx`` will correspond to the
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| /tf-a-ffa_el3_spmc/docs/ |
| A D | change-log.rst | 1666 - Unify type of "cpu_idx" and Platform specific defines across PSCI module.
2080 - Unify type of "cpu_idx" across PSCI module.
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