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Searched refs:ep_info (Results 1 – 25 of 85) sorted by relevance

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/tf-a-ffa_el3_spmc/plat/renesas/common/
A Dbl2_plat_mem_params_desc.c30 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
32 .ep_info.spsr = SPSR_64(MODE_EL3,
34 .ep_info.pc = BL31_BASE,
52 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
54 .ep_info.pc = BL32_BASE,
55 .ep_info.spsr = 0,
56 .ep_info.args.arg3 = (uintptr_t)fdt_blob,
71 .ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX,
73 .ep_info.pc = BL33_BASE,
75 .ep_info.args.arg0 = RCAR_BL33_ARG0,
[all …]
/tf-a-ffa_el3_spmc/plat/layerscape/common/aarch64/
A Dls_bl2_mem_params_desc.c30 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
33 .ep_info.pc = EL3_PAYLOAD_BASE,
34 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
51 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
54 .ep_info.pc = BL31_BASE,
58 .ep_info.args.arg1 = LS_BL31_PLAT_PARAM_VAL,
77 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
79 .ep_info.pc = BL32_BASE,
93 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
96 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/arm/common/aarch64/
A Darm_bl2_mem_params_desc.c43 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
46 .ep_info.pc = EL3_PAYLOAD_BASE,
63 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
66 .ep_info.pc = BL31_BASE,
107 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
109 .ep_info.pc = BL32_BASE,
126 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
144 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
170 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
173 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/qemu/common/
A Dqemu_bl2_setup.c163 err = parse_optee_header(&bl_mem_params->ep_info, in qemu_bl2_handle_post_image_load()
177 bl_mem_params->ep_info.args.arg0 = in qemu_bl2_handle_post_image_load()
178 bl_mem_params->ep_info.args.arg1; in qemu_bl2_handle_post_image_load()
179 bl_mem_params->ep_info.args.arg1 = 0; in qemu_bl2_handle_post_image_load()
181 bl_mem_params->ep_info.args.arg3 = 0; in qemu_bl2_handle_post_image_load()
192 pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc; in qemu_bl2_handle_post_image_load()
202 bl_mem_params->ep_info.args.arg0 = in qemu_bl2_handle_post_image_load()
204 bl_mem_params->ep_info.args.arg1 = 0U; in qemu_bl2_handle_post_image_load()
205 bl_mem_params->ep_info.args.arg2 = 0U; in qemu_bl2_handle_post_image_load()
206 bl_mem_params->ep_info.args.arg3 = 0U; in qemu_bl2_handle_post_image_load()
[all …]
A Dqemu_bl2_mem_params_desc.c25 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
28 .ep_info.pc = EL3_PAYLOAD_BASE,
29 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
42 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
45 .ep_info.pc = BL31_BASE,
46 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
49 .ep_info.args.arg1 = QEMU_BL31_PLAT_PARAM_VAL,
76 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
78 .ep_info.pc = BL32_BASE,
132 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/
A Dhikey960_bl2_mem_params_desc.c44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
93 .ep_info.pc = BL32_BASE,
110 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
128 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
144 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
147 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/marvell/armada/common/aarch64/
A Dmarvell_bl2_mem_params_desc.c45 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
48 .ep_info.pc = EL3_PAYLOAD_BASE,
65 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
68 .ep_info.pc = BL31_BASE,
92 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
94 .ep_info.pc = BL32_BASE,
112 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
131 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
147 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
150 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/
A Dhikey_bl2_mem_params_desc.c44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
93 .ep_info.pc = BL32_BASE,
110 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
128 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
144 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
147 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/
A Dbl2_plat_mem_params_desc.c44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
91 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
93 .ep_info.pc = BL32_BASE,
110 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
128 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
144 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
147 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/arm/board/diphda/common/
A Ddiphda_bl2_mem_params_desc.c25 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
28 .ep_info.pc = BL31_BASE,
29 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
31 .ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
46 .ep_info.pc = BL32_BASE,
47 .ep_info.args.arg0 = DIPHDA_TOS_FW_CONFIG_BASE,
62 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
72 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
74 .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_bl2_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
43 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
46 .ep_info.pc = BL31_BASE,
47 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
50 .ep_info.args.arg3 = BRCM_BL31_PLAT_PARAM_VAL,
70 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
72 .ep_info.pc = BL32_BASE,
86 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
89 .ep_info.pc = PRELOADED_BL33_BASE,
94 .ep_info.pc = PLAT_BRCM_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/rpi/rpi3/aarch64/
A Drpi3_bl2_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
30 .ep_info.pc = BL31_BASE,
31 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
34 .ep_info.args.arg1 = RPI3_BL31_PLAT_PARAM_VAL,
54 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
57 .ep_info.pc = BL32_BASE,
75 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
96 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
114 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
118 .ep_info.pc = PRELOADED_BL33_BASE,
[all …]
/tf-a-ffa_el3_spmc/plat/socionext/uniphier/
A Duniphier_image_desc.c31 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
45 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
48 .ep_info.pc = UNIPHIER_BL31_OFFSET,
49 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
67 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
70 .ep_info.pc = UNIPHIER_BL32_OFFSET,
71 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
85 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
88 .ep_info.pc = UNIPHIER_BL33_OFFSET,
89 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
[all …]
/tf-a-ffa_el3_spmc/plat/intel/soc/common/
A Dbl2_plat_mem_params_desc.c27 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
44 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
47 .ep_info.pc = EL3_PAYLOAD_BASE,
48 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
64 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
67 .ep_info.pc = BL31_BASE,
68 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
82 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
84 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/
A Dimx8mm_bl2_mem_params_desc.c15 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
18 .ep_info.pc = BL31_BASE,
19 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
30 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
33 .ep_info.pc = BL32_BASE,
46 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
61 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
72 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
76 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
82 .ep_info.pc = PLAT_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/imx/imx7/common/
A Dimx7_bl2_el3_common.c73 err = parse_optee_header(&bl_mem_params->ep_info, in bl2_plat_handle_post_image_load()
86 bl_mem_params->ep_info.args.arg0 = in bl2_plat_handle_post_image_load()
87 bl_mem_params->ep_info.args.arg1; in bl2_plat_handle_post_image_load()
88 bl_mem_params->ep_info.args.arg1 = 0; in bl2_plat_handle_post_image_load()
90 bl_mem_params->ep_info.args.arg2 = in bl2_plat_handle_post_image_load()
93 bl_mem_params->ep_info.args.arg2 = 0; in bl2_plat_handle_post_image_load()
94 bl_mem_params->ep_info.args.arg3 = 0; in bl2_plat_handle_post_image_load()
95 bl_mem_params->ep_info.spsr = imx7_get_spsr_for_bl32_entry(); in bl2_plat_handle_post_image_load()
102 pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc; in bl2_plat_handle_post_image_load()
105 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in bl2_plat_handle_post_image_load()
[all …]
A Dimx7_bl2_mem_params_desc.c17 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
20 .ep_info.pc = BL32_BASE,
33 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
48 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
59 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
63 .ep_info.pc = PRELOADED_BL33_BASE,
69 .ep_info.pc = BL33_BASE,
/tf-a-ffa_el3_spmc/bl1/tbbr/
A Dtbbr_img_desc.c19 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
25 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
27 .ep_info.pc = NS_BL1U_BASE,
37 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
48 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
50 .ep_info.pc = BL2U_BASE,
56 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
/tf-a-ffa_el3_spmc/plat/arm/common/aarch32/
A Darm_bl2_mem_params_desc.c26 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
42 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
45 .ep_info.pc = BL32_BASE,
46 .ep_info.spsr = SPSR_MODE32(MODE32_mon, SPSR_T_ARM,
59 SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
69 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
72 .ep_info.pc = PRELOADED_BL33_BASE,
77 .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dplat_bl2_mem_params_desc.c26 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
31 .ep_info.pc = STM32MP_BL32_BASE,
33 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
56 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
70 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
86 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
90 .ep_info.pc = PLAT_STM32MP_NS_IMAGE_OFFSET,
91 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
/tf-a-ffa_el3_spmc/plat/nxp/common/setup/aarch64/
A Dls_bl2_mem_params_desc.c29 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
32 .ep_info.pc = BL31_BASE,
33 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
36 .ep_info.args.arg1 = LS_BL31_PLAT_PARAM_VAL,
61 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
63 .ep_info.pc = BL32_BASE,
82 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
84 .ep_info.pc = BL33_BASE,
96 .ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
/tf-a-ffa_el3_spmc/services/std_svc/spm/spmc/
A Dspmc_setup.c41 void spmc_el0_sp_setup(sp_desc_t *sp, entry_point_info_t *ep_info) in spmc_el0_sp_setup() argument
157 void spmc_el1_sp_setup(sp_desc_t *sp, entry_point_info_t *ep_info) in spmc_el1_sp_setup() argument
161 assert(NULL != ep_info); in spmc_el1_sp_setup()
167 zeromem(&ep_info->args, sizeof(ep_info->args)); in spmc_el1_sp_setup()
181 assert (sp->secondary_ep == ep_info->pc); in spmc_el1_sp_setup()
190 void spmc_sp_common_setup(sp_desc_t *sp, entry_point_info_t *ep_info) in spmc_sp_common_setup() argument
206 ep_info->spsr = SPSR_64(MODE_EL0, MODE_SP_EL0, in spmc_sp_common_setup()
210 ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in spmc_sp_common_setup()
220 cm_setup_context(cpu_ctx, ep_info); in spmc_sp_common_setup()
/tf-a-ffa_el3_spmc/plat/arm/board/juno/
A Djuno_bl2_setup.c30 bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, in arm_bl2_plat_handle_post_image_load()
50 entry_point_info_t *ep_info; in plat_get_next_bl_params() local
67 ep_info = &param_node->ep_info; in plat_get_next_bl_params()
68 ep_info->args.arg1 = (uint32_t)fw_config_base; in plat_get_next_bl_params()
/tf-a-ffa_el3_spmc/common/
A Ddesc_image_load.c179 bl_current_exec_node->ep_info = &desc_ptr->ep_info; in get_next_bl_params_from_mem_params_desc()
289 if (params_node->ep_info->args.arg1 == 0U) in populate_next_bl_params_config()
290 params_node->ep_info->args.arg1 = in populate_next_bl_params_config()
292 if (params_node->ep_info->args.arg2 == 0U) in populate_next_bl_params_config()
293 params_node->ep_info->args.arg2 = in populate_next_bl_params_config()
296 if (params_node->ep_info->args.arg0 == 0U) in populate_next_bl_params_config()
297 params_node->ep_info->args.arg0 = in populate_next_bl_params_config()
299 if (params_node->ep_info->args.arg1 == 0U) in populate_next_bl_params_config()
300 params_node->ep_info->args.arg1 = in populate_next_bl_params_config()
346 *bl32_ep_info_out = *node->ep_info; in bl31_params_parse_helper()
[all …]
/tf-a-ffa_el3_spmc/plat/common/
A Dplat_bl1_common.c41 struct entry_point_info *ep_info) in bl1_plat_set_ep_info() argument
89 entry_point_info_t *ep_info; in bl1_plat_handle_post_image_load() local
99 ep_info = &image_desc->ep_info; in bl1_plat_handle_post_image_load()
115 ep_info->args.arg1 = (uintptr_t)bl2_secram_layout; in bl1_plat_handle_post_image_load()

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