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/tf-a-ffa_el3_spmc/plat/xilinx/versal/pm_service/
A Dpm_api_sys.h37 uint32_t flag);
39 uint32_t flag);
47 uint32_t flag);
49 uint32_t flag);
59 uint32_t flag);
61 uint32_t flag);
73 uint32_t flag);
75 uint32_t flag);
82 uint32_t flag);
88 uint32_t flag);
[all …]
A Dpm_api_sys.c193 uint32_t flag) in pm_req_suspend() argument
312 uint32_t flag) in pm_get_device_status() argument
430 uint32_t flag) in pm_pinctrl_set_function() argument
451 uint32_t flag) in pm_pinctrl_get_function() argument
575 uint32_t flag) in pm_clock_set_divider() argument
596 uint32_t flag) in pm_clock_get_divider() argument
723 uint32_t flag) in pm_pll_set_mode() argument
744 uint32_t flag) in pm_pll_get_mode() argument
864 uint32_t flag) in pm_api_ioctl() argument
944 uint32_t flag) in pm_feature_check() argument
[all …]
/tf-a-ffa_el3_spmc/include/bl31/
A Dinterrupt_mgmt.h65 #define get_interrupt_rm_flag(flag, ss) \ argument
66 ((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
67 #define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss)) argument
68 #define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss))) argument
77 #define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT) argument
78 #define clr_interrupt_src_ss(flag) ((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT)) argument
79 #define get_interrupt_src_ss(flag) (((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \ argument
/tf-a-ffa_el3_spmc/bl31/
A Dinterrupt_mgmt.c102 uint32_t flag, bit_pos; in set_scr_el3_from_rm() local
104 flag = get_interrupt_rm_flag(interrupt_type_flags, security_state); in set_scr_el3_from_rm()
106 intr_type_descs[type].scr_el3[security_state] = (u_register_t)flag << bit_pos; in set_scr_el3_from_rm()
114 cm_write_scr_el3_bit(security_state, bit_pos, flag); in set_scr_el3_from_rm()
151 uint32_t bit_pos, flag; in disable_intr_rm_local() local
155 flag = get_interrupt_rm_flag(INTR_DEFAULT_RM, security_state); in disable_intr_rm_local()
158 cm_write_scr_el3_bit(security_state, bit_pos, flag); in disable_intr_rm_local()
169 uint32_t bit_pos, flag; in enable_intr_rm_local() local
173 flag = get_interrupt_rm_flag(intr_type_descs[type].flags, in enable_intr_rm_local()
177 cm_write_scr_el3_bit(security_state, bit_pos, flag); in enable_intr_rm_local()
/tf-a-ffa_el3_spmc/tools/encrypt_fw/src/
A Dmain.c89 unsigned long flag; in parse_fw_enc_status_flag() local
92 flag = strtoul(arg, &endptr, 16); in parse_fw_enc_status_flag()
93 if (*endptr != '\0' || flag > FW_ENC_WITH_BSSK) { in parse_fw_enc_status_flag()
98 *fw_enc_status = flag & FW_ENC_STATUS_FLAG_MASK; in parse_fw_enc_status_flag()
A Dcmd_opt.c30 long_opt[num_reg_opt].flag = 0; in cmd_opt_add()
/tf-a-ffa_el3_spmc/plat/mediatek/common/drivers/gpio/
A Dmtgpio_common.h93 .flag = _flag, \
101 uint8_t flag; member
A Dmtgpio_common.c148 if (gpio_info.flag) { in mt_gpio_set_pull_chip()
213 if (gpio_info.flag) { in mt_gpio_get_pull_chip()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8173/drivers/spm/
A Dspm_mcdi.c410 unsigned int pwr_status, shift, i, flag = 0; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off() local
420 flag |= (pwr_status & (1 << shift)) >> shift; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
422 if (!flag) in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
430 flag |= (pwr_status & (1 << shift)) >> shift; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
432 if (!flag) in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
/tf-a-ffa_el3_spmc/docs/plat/arm/
A Darm-build-options.rst8 DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
11 flag.
37 - ``ARM_PLAT_MT``: This flag determines whether the Arm platform layer has to
38 cater for the multi-threading ``MT`` bit when accessing MPIDR. When this flag
41 this flag is 0. Note that this option is not used on FVP platforms.
46 State-ID yet. Hence this flag is used to configure whether to use the
47 recommended State-ID encoding or not. The default value of this flag is 0,
92 SBROM library must be specified via ``CCSBROM_LIB_PATH`` flag.
126 - ``CSS_DETECT_PRE_1_7_0_SCP``: Boolean flag to detect SCP version
132 - ``CSS_LOAD_SCP_IMAGES``: Boolean flag, which when set, adds SCP_BL2 and
[all …]
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dbuild-options.rst183 of the value of this flag if the CPU supports it.
206 flag has to be enabled. 0 is the default.
304 flag depends on ``DECRYPTION_SUPPORT`` build flag which is marked as
308 This flag depends on ``DECRYPTION_SUPPORT`` build flag which is marked as
317 build flag which is marked as experimental.
356 This flag depends on ``DECRYPTION_SUPPORT`` build flag which is marked as
423 By default this flag is set to '0'. Enabling this flag builds BL1 and BL2 in
451 The default value of this flag is ``sha256``.
737 The default value of this flag is ``0``.
768 This flag is disabled by default.
[all …]
/tf-a-ffa_el3_spmc/drivers/brcm/spi/
A Diproc_qspi.c149 const uint8_t *tx, uint8_t *rx, uint32_t flag) in mspi_xfer() argument
154 if (flag & SPI_XFER_QUAD) { in mspi_xfer()
223 if (bytes == 0 && (flag & SPI_XFER_END)) in mspi_xfer()
229 if (bytes == 0 && (flag & SPI_XFER_END)) in mspi_xfer()
/tf-a-ffa_el3_spmc/tools/cert_create/src/
A Dcmd_opt.c30 long_opt[num_reg_opt].flag = 0; in cmd_opt_add()
A Dkey.c215 cmd_opt.long_opt.flag = NULL; in key_init()
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/drivers/pwrc/
A Dhisi_pwrc.c211 unsigned int flag = BIT((cluster<<2) + core + 16); in hisi_set_cpu_boot_flag() local
215 mmio_setbits_32(REG_SCBAKDATA3_OFFSET, flag); in hisi_set_cpu_boot_flag()
222 unsigned int flag = BIT((cluster<<2) + core + 16); in hisi_clear_cpu_boot_flag() local
226 mmio_clrbits_32(REG_SCBAKDATA3_OFFSET, flag); in hisi_clear_cpu_boot_flag()
/tf-a-ffa_el3_spmc/tools/fiptool/
A Dwin_posix.h80 int *flag; member
A Dwin_posix.c220 if (longopts[loptn].flag != 0) { in getopt_1long()
221 *longopts[loptn].flag = result; in getopt_1long()
/tf-a-ffa_el3_spmc/docs/process/
A Dsecurity-hardening.rst127 - The ``BRANCH_PROTECTION`` build flag can be used to enable Pointer
130 - The ``ENABLE_STACK_PROTECTOR`` build flag can be used to identify buffer
133 - The ``W`` build flag can be used to enable a number of compiler warning
164 NB: The ``Werror`` flag is enabled by default in TF-A and can be disabled by
165 setting the ``E`` build flag to 0.
/tf-a-ffa_el3_spmc/tools/nxp/create_pbl/
A Dcreate_pbl.c327 int add_pbi_stop_cmd(FILE *fp_rcw_pbi_op, enum stop_command flag) in add_pbi_stop_cmd() argument
344 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
364 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
394 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
413 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
/tf-a-ffa_el3_spmc/drivers/nxp/auth/csf_hdr_parser/
A Dinput_bl2_ch272 # Please note that OUTPUT SG BIN is only required for 2041/3041/4080/5020/5040 when ESBC flag is no…
78 # Required for 4240/9164/1040/C290 only when ESBC flag is not set. [Mandatory]
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/
A Dhikey960_bl_common.c329 static void isps_control_clock(int flag) in isps_control_clock() argument
334 if (flag) { in isps_control_clock()
/tf-a-ffa_el3_spmc/docs/plat/
A Dnvidia-tegra.rst129 /* L2 ECC parity protection disable flag \*/
146 - 'tegra\_enable\_l2\_ecc\_parity\_prot': This flag enables the L2 ECC and Parity
147 Protection bit, for Arm Cortex-A57 CPUs, during CPU boot. This flag will
/tf-a-ffa_el3_spmc/include/drivers/
A Dufs.h436 query_flag_t flag; member
457 query_flag_t flag; member
/tf-a-ffa_el3_spmc/drivers/brcm/emmc/
A Demmc_chal_sd.c833 uint32_t control, flag; in chal_sd_reset_line() local
841 flag = SD4_EMMC_TOP_CTRL1_CMDRST_MASK | SD4_EMMC_TOP_CTRL1_DATRST_MASK; in chal_sd_reset_line()
843 if (flag != (line | flag)) in chal_sd_reset_line()
/tf-a-ffa_el3_spmc/docs/design/
A Dcpu-specific-build-macros.rst15 `CVE-2017-5715`_. This flag can be set to 0 by the platform if none
16 of the PEs in the system need the workaround. Setting this flag to 0 provides
439 - ``SKIP_A57_L1_FLUSH_PWR_DWN``: This flag enables an optimization in the
447 - ``A53_DISABLE_NON_TEMPORAL_HINT``: This flag disables the cache non-temporal
453 flag enforces this behaviour. This needs to be enabled only for revisions
456 - ``A57_DISABLE_NON_TEMPORAL_HINT``: This flag has the same behaviour as
462 - ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable
467 the optimization. This flag is disabled by default.
469 - ``NEOVERSE_Nx_EXTERNAL_LLC``: This flag indicates that an external last

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