| /tf-a-ffa_el3_spmc/lib/zlib/ |
| A D | inflate.c | 509 have--; \
652 in = have;
759 if (copy > have) copy = have;
791 have -= copy;
906 if (copy > have) copy = have;
936 state->have = 0;
957 state->have = 0;
1378 unsigned FAR *have; in syncsearch()
1385 got = *have;
1396 *have = got;
[all …]
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| A D | inflate.h | 117 unsigned have; /* number of code lengths in lens[] */ member
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| A D | zlib.h | 1818 unsigned have; member
1826 ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : (gzgetc)(g))
1829 ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : (gzgetc)(g))
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| /tf-a-ffa_el3_spmc/ |
| A D | dco.txt | 18 have the right to submit it under the open source license
23 license and I have the right under that license to submit that
30 person who certified (a), (b) or (c) and I have not modified
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| /tf-a-ffa_el3_spmc/docs/plat/ |
| A D | nvidia-tegra.rst | 25 including legacy ARMv7 applications. The Denver 2 processors each have 128 KB
26 Instruction and 64 KB Data Level 1 caches; and have a 2MB shared Level 2
27 unified cache. The Cortex-A57 processors each have 48 KB Instruction and 32 KB
28 Data Level 1 caches; and also have a 2 MB shared Level 2 unified cache. A
63 including legacy Armv7-A applications. The Cortex-A57 processors each have
64 48 KB Instruction and 32 KB Data Level 1 caches; and have a 2 MB shared
65 Level 2 unified cache. The Cortex-A53 processors each have 32 KB Instruction
66 and 32 KB Data Level 1 caches; and have a 512 KB shared Level 2 unified cache.
100 the scatter file to be used. Tegra platforms have verified BL31 image generation
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| A D | index.rst | 53 currently have associated documentation:
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| A D | rpi4.rst | 10 as well, but have not been tested at this point.
29 ``config.txt``. You should have AArch64 code in the file loaded as the
73 memory. The load addresses have a default, but can also be changed by
|
| A D | xilinx-zynqmp.rst | 19 To build bl32 TSP you have to rebuild bl31 too:
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| A D | rpi3.rst | 48 Ideally, we want to load the kernel and have all cores available, which means
170 The kernel used by `Raspbian`_ doesn't have support for PSCI, so it is needed to
213 ``config.txt``. It doesn't have to contain a kernel, it could have any
405 the existing ``kernel7.img`` (we have already copied a AArch64 kernel).
410 The instructions assume that you have an SD card with a fresh install of
412 untouched). They have been tested with the image available in 2018-03-13.
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| /tf-a-ffa_el3_spmc/docs/threat_model/ |
| A D | index.rst | 8 using a data flow diagram. Then we provide a list of threats we have identified
|
| /tf-a-ffa_el3_spmc/docs/design/ |
| A D | psci-pd-tree.rst | 54 ``plat_get_aff_count()`` and ``plat_get_aff_state()`` have been
59 where the power domain tree does not have a single root node, for example,
74 above text further. The leaf and non-leaf nodes in this tree have been numbered
132 platform API have changed since it is required to validate the passed MPIDR. It
156 contiguous or certain cores have been disabled. This essentially means that the
157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
178 To fulfill requirement 3 and 4, separate data structures have been defined
200 * -> cpu_start_idx + ncpus' have this node as their parent.
243 node. Other fields have been ignored for simplicity.
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| /tf-a-ffa_el3_spmc/docs/process/ |
| A D | code-review-guidelines.rst | 33 to different timescales, and have different priorities. Keep this in
65 - If there is only one code owner and they have become unresponsive, ask one
73 directory to have the freedom to change it in any way. This way, your changes
80 There are no good or bad review comments. If you have any doubt about a patch or
128 through the ``Code-Owner-Review+1`` label in Gerrit. If instead, they have
178 - New files must have the correct license and copyright headers. See :ref:`this
203 - Before merging a patch, verify that all review comments have been addressed.
208 through the ``Maintainer-Review+1`` label in Gerrit. If instead, they have
|
| A D | faq.rst | 24 they follow the coding guidelines, have already had some code review, and have
48 time. In simple cases where all potential regressions have already been tested,
|
| A D | security.rst | 24 If you think you have found a security vulnerability, please **do not**
29 TF-A have a chance to consider the implications of the vulnerability and its
|
| A D | contributing.rst | 7 - Make sure you have a Github account and you are logged on both
52 - Avoid long commit series. If you do have a long series, consider whether
66 - Ensure that each commit also has a unique ``Change-Id:`` line. If you have
82 - What impact does it have?
111 should have a copyright notice and BSD-3-Clause SPDX license identifier of
|
| /tf-a-ffa_el3_spmc/docs/about/ |
| A D | contact.rst | 8 If you think you have found a security vulnerability, please report this using
46 Arm licensees have an additional support conduit - they may contact Arm directly
|
| /tf-a-ffa_el3_spmc/docs/design_documents/ |
| A D | cmake_framework.rst | 96 generation or dtc for device tree compilation. These tools have to be found
108 In the provisioning phase, first we have to obtain the necessary resources, i.e.
109 clone the code repository and other dependencies. Next we have to do the
118 Usually during development only the steps in this second phase have to be
131 it. This means that all source and header files used by the target will have all
|
| /tf-a-ffa_el3_spmc/docs/plat/marvell/armada/misc/ |
| A D | mvebu-io-win.rst | 8 Transactions that are decoded by CCU windows as IO peripheral, have an additional
|
| /tf-a-ffa_el3_spmc/docs/getting_started/ |
| A D | image-terminology.rst | 10 - Some of the names and abbreviated names have changed to accommodate new
86 have additional images and/or a different load/execution ordering. The
124 The terminology for these images has not been widely adopted yet but they have
164 Some systems may have additional processors to the AP and SCP. For example, a
|
| A D | prerequisites.rst | 17 have performed tests using Ubuntu 16.04 LTS (64-bit) but other distributions
141 If you have Node.js installed already, you can automatically install this hook,
149 If you have opted **not** to install Node.js, you can install the Gerrit hook
|
| /tf-a-ffa_el3_spmc/docs/ |
| A D | index.rst | 76 have additional documentation that has been provided by the maintainers of the
83 have previously been raised against the software.
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| /tf-a-ffa_el3_spmc/docs/security_advisories/ |
| A D | security-advisory-tfv-7.rst | 37 (SDEI)`_. Also, the TF-A project does not have visibility of all
45 have a system performance impact, which varies for each CPU type and use-case.
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| /tf-a-ffa_el3_spmc/docs/components/fconf/ |
| A D | index.rst | 38 Properties composing the |FCONF| have to be stored in C structures. If
105 This function will call all the ``populate()`` callbacks which have been
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| /tf-a-ffa_el3_spmc/docs/plat/arm/ |
| A D | arm-build-options.rst | 28 have specific values at boot. This boolean option allows the Trusted Firmware
29 to have a Linux kernel image as BL33 by preparing the registers to these
147 particular SGI/RD platform may have multiple variants which may differ in
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| /tf-a-ffa_el3_spmc/docs/components/ |
| A D | romlib-design.rst | 17 2. Functions can be patched after they have been programmed into ROM.
122 This will have for effect to shift down all the BL images by 1 page.
|