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/tf-a-ffa_el3_spmc/plat/nxp/common/img_loadr/
A Dload_img.c31 int load_img(unsigned int image_id, uintptr_t *image_base, in load_img() argument
41 .image_info.image_base = *image_base - CSF_HDR_SZ, in load_img()
44 .image_info.image_base = *image_base, in load_img()
52 mmap_add_dynamic_region(img_info.image_info.image_base, in load_img()
53 img_info.image_info.image_base, in load_img()
67 *image_base = img_info.image_info.image_base + CSF_HDR_SZ; in load_img()
70 mmap_remove_dynamic_region(img_info.image_info.image_base, in load_img()
74 *image_base = img_info.image_info.image_base; in load_img()
/tf-a-ffa_el3_spmc/common/
A Dimage_decompress.c37 info->image_base = decompressor_buf_base; in image_decompress_prepare()
43 uintptr_t compressed_image_base, image_base, work_base; in image_decompress() local
52 compressed_image_base = info->image_base; in image_decompress()
57 image_base = info->image_base; in image_decompress()
67 &image_base, info->image_max_size, in image_decompress()
75 info->image_size = image_base - info->image_base; in image_decompress()
77 flush_dcache_range(info->image_base, info->image_size); in image_decompress()
A Dbl_common.c75 uintptr_t image_base; in load_image() local
83 image_base = image_data->image_base; in load_image()
101 INFO("Loading image id=%u at address 0x%lx\n", image_id, image_base); in load_image()
126 io_result = io_read(image_handle, image_base, image_size, &bytes_read); in load_image()
132 INFO("Image id=%u loaded: 0x%lx - 0x%lx\n", image_id, image_base, in load_image()
133 (uintptr_t)(image_base + image_size)); in load_image()
157 flush_dcache_range(image_data->image_base, in load_image_flush()
194 (void *)image_data->image_base, in load_auth_image_recursive()
198 zero_normalmem((void *)image_data->image_base, in load_auth_image_recursive()
200 flush_dcache_range(image_data->image_base, in load_auth_image_recursive()
[all …]
/tf-a-ffa_el3_spmc/plat/arm/common/
A Darm_dyn_cfg.c156 (void *)image_info.image_base, in arm_bl1_set_bl2_hash()
205 uintptr_t image_base; in arm_bl2_dyn_cfg_init() local
233 image_base = dtb_info->config_addr; in arm_bl2_dyn_cfg_init()
243 if (check_uptr_overflow(image_base, image_size)) { in arm_bl2_dyn_cfg_init()
248 if ((image_base >= BL31_BASE) && in arm_bl2_dyn_cfg_init()
249 (image_base <= BL31_LIMIT)) { in arm_bl2_dyn_cfg_init()
254 if (image_base < ARM_BL_RAM_BASE) { in arm_bl2_dyn_cfg_init()
262 if ((image_base >= BL32_BASE) && in arm_bl2_dyn_cfg_init()
263 (image_base <= BL32_LIMIT)) { in arm_bl2_dyn_cfg_init()
269 cfg_mem_params->image_info.image_base = image_base; in arm_bl2_dyn_cfg_init()
/tf-a-ffa_el3_spmc/lib/optee/
A Doptee_utils.c90 init_load_addr = image_info->image_base; in parse_optee_image()
93 if (check_uptr_overflow(image_info->image_base, in parse_optee_image()
96 free_end = image_info->image_base + (image_info->image_max_size - 1); in parse_optee_image()
106 if (!((init_load_addr >= image_info->image_base) && in parse_optee_image()
111 (void *)image_info->image_base, in parse_optee_image()
112 (void *)(image_info->image_base + in parse_optee_image()
126 image_info->image_base = init_load_addr; in parse_optee_image()
208 header_ep->pc = pager_image_info->image_base; in parse_optee_header()
215 header_ep->args.arg1 = paged_image_info->image_base; in parse_optee_header()
/tf-a-ffa_el3_spmc/plat/nxp/common/setup/aarch64/
A Dls_bl2_mem_params_desc.c42 .image_info.image_base = BL31_BASE - CSF_HDR_SZ,
46 .image_info.image_base = BL31_BASE,
68 .image_info.image_base = BL32_BASE - CSF_HDR_SZ,
72 .image_info.image_base = BL32_BASE,
89 .image_info.image_base = BL33_BASE - CSF_HDR_SZ,
93 .image_info.image_base = BL33_BASE,
/tf-a-ffa_el3_spmc/plat/rpi/rpi3/aarch64/
A Drpi3_bl2_mem_params_desc.c39 .image_info.image_base = BL31_BASE,
61 .image_info.image_base = BL32_BASE,
82 .image_info.image_base = BL32_BASE,
104 .image_info.image_base = RPI3_OPTEE_PAGEABLE_LOAD_BASE,
128 .image_info.image_base = PLAT_RPI3_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/socionext/uniphier/
A Duniphier_image_desc.c28 .image_info.image_base = UNIPHIER_SCP_OFFSET,
42 .image_info.image_base = UNIPHIER_BL31_OFFSET,
64 .image_info.image_base = UNIPHIER_BL32_OFFSET,
82 .image_info.image_base = UNIPHIER_BL33_OFFSET,
107 uniphier_image_descs[i].image_info.image_base += mem_base; in REGISTER_BL_IMAGE_DESCS()
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/
A Dhikey960_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
115 .image_info.image_base = BL32_BASE,
134 .image_info.image_base = HIKEY960_OPTEE_PAGEABLE_LOAD_BASE,
156 .image_info.image_base = NS_BL1U_BASE,
/tf-a-ffa_el3_spmc/plat/marvell/armada/common/aarch64/
A Dmarvell_bl2_mem_params_desc.c33 .image_info.image_base = SCP_BL2_BASE,
77 .image_info.image_base = BL31_BASE,
98 .image_info.image_base = BL32_BASE,
117 .image_info.image_base = BL32_BASE,
137 .image_info.image_base = MARVELL_OPTEE_PAGEABLE_LOAD_BASE,
159 .image_info.image_base = MARVELL_DRAM_BASE,
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/
A Dhikey_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
115 .image_info.image_base = BL32_BASE,
134 .image_info.image_base = HIKEY_OPTEE_PAGEABLE_LOAD_BASE,
156 .image_info.image_base = HIKEY_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/
A Dbl2_plat_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
115 .image_info.image_base = BL32_BASE,
134 .image_info.image_base = POPLAR_OPTEE_PAGEABLE_LOAD_BASE,
156 .image_info.image_base = PLAT_POPLAR_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/arm/board/diphda/common/
A Ddiphda_bl2_mem_params_desc.c34 .image_info.image_base = BL31_BASE,
50 .image_info.image_base = BL32_BASE,
59 .image_info.image_base = DIPHDA_TOS_FW_CONFIG_BASE,
78 .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
55 .image_info.image_base = BL31_BASE,
76 .image_info.image_base = BL32_BASE,
98 .image_info.image_base = PLAT_BRCM_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/qemu/common/
A Dqemu_bl2_mem_params_desc.c53 .image_info.image_base = BL31_BASE,
83 .image_info.image_base = BL32_BASE,
101 .image_info.image_base = BL32_BASE,
120 .image_info.image_base = QEMU_OPTEE_PAGEABLE_LOAD_BASE,
141 .image_info.image_base = NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/
A Dimx8mm_bl2_mem_params_desc.c23 .image_info.image_base = BL31_BASE,
38 .image_info.image_base = BL32_BASE,
52 .image_info.image_base = BL32_BASE,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/bl1/tbbr/
A Dtbbr_img_desc.c17 .image_info.image_base = BL2_BASE,
35 .image_info.image_base = SCP_BL2U_BASE,
46 .image_info.image_base = BL2U_BASE,
/tf-a-ffa_el3_spmc/plat/arm/common/aarch64/
A Darm_bl2_mem_params_desc.c31 .image_info.image_base = SCP_BL2_BASE,
75 .image_info.image_base = BL31_BASE,
113 .image_info.image_base = BL32_BASE,
131 .image_info.image_base = BL32_BASE,
150 .image_info.image_base = ARM_OPTEE_PAGEABLE_LOAD_BASE,
182 .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
/tf-a-ffa_el3_spmc/plat/imx/imx7/common/
A Dimx7_bl2_mem_params_desc.c25 .image_info.image_base = IMX7_OPTEE_BASE,
39 .image_info.image_base = IMX7_OPTEE_BASE,
73 .image_info.image_base = IMX7_UBOOT_BASE,
/tf-a-ffa_el3_spmc/plat/arm/common/aarch32/
A Darm_bl2_mem_params_desc.c31 .image_info.image_base = SCP_BL2_BASE,
51 .image_info.image_base = BL32_BASE,
81 .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dplat_bl2_mem_params_desc.c42 .image_info.image_base = STM32MP_OPTEE_BASE,
45 .image_info.image_base = STM32MP_BL32_BASE,
98 .image_info.image_base = PLAT_STM32MP_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/intel/soc/common/
A Dbl2_plat_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
73 .image_info.image_base = BL31_BASE,
88 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/tf-a-ffa_el3_spmc/plat/renesas/common/
A Dbl2_plat_mem_params_desc.c40 .image_info.image_base = BL31_BASE,
61 .image_info.image_base = BL32_BASE,
82 .image_info.image_base = BL33_BASE,
/tf-a-ffa_el3_spmc/plat/layerscape/common/aarch64/
A Dls_bl2_mem_params_desc.c63 .image_info.image_base = BL31_BASE,
83 .image_info.image_base = BL32_BASE,
106 .image_info.image_base = BL33_BASE,
/tf-a-ffa_el3_spmc/bl1/
A Dbl1_fwu.c169 uintptr_t image_base, image_end; in bl1_fwu_image_check_overlaps() local
178 checked_image_base = checked_info->image_base; in bl1_fwu_image_check_overlaps()
200 image_base = info->image_base; in bl1_fwu_image_check_overlaps()
201 image_end = image_base + info->image_size - 1; in bl1_fwu_image_check_overlaps()
207 assert (image_end > image_base); in bl1_fwu_image_check_overlaps()
211 (checked_image_end < image_base))) { in bl1_fwu_image_check_overlaps()
352 dest_addr = desc->image_info.image_base + desc->copied_size; in bl1_fwu_image_copy()
409 base_addr = desc->image_info.image_base; in bl1_fwu_image_auth()
722 zero_normalmem((void *)desc->image_info.image_base, in bl1_fwu_image_reset()
724 flush_dcache_range(desc->image_info.image_base, in bl1_fwu_image_reset()

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