/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/include/ |
A D | mce_private.h | 95 int32_t (*update_cstate_info)(uint32_t ari_base, 107 int32_t (*update_crossover_time)(uint32_t ari_base, 120 int32_t (*write_cstate_stats)(uint32_t ari_base, 158 int32_t (*cc3_ctrl)(uint32_t ari_base, 166 int32_t (*update_reset_vector)(uint32_t ari_base); 171 int32_t (*roc_flush_cache)(uint32_t ari_base); 177 int32_t (*roc_flush_cache_trbits)(uint32_t ari_base); 183 int32_t (*roc_clean_cache)(uint32_t ari_base); 234 int32_t ari_reset_vector_update(uint32_t ari_base); 236 int32_t ari_roc_flush_cache(uint32_t ari_base); [all …]
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/ |
A D | tegra_private.h | 41 int32_t uart_id; 43 int32_t l2_ecc_parity_prot_dis; 77 int32_t tegra_soc_validate_power_state(uint32_t power_state, 82 void plat_enable_console(int32_t id); 94 int32_t plat_lock_cpu_vectors(void); 98 int32_t tegra_fiq_get_intr_context(void); 108 int32_t tegra_system_suspended(void); 109 int32_t tegra_soc_cpu_standby(plat_local_state_t cpu_state); 111 int32_t tegra_soc_pwr_domain_on(u_register_t mpidr); 116 int32_t tegra_soc_prepare_system_reset(void); [all …]
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/tf-a-ffa_el3_spmc/include/drivers/brcm/emmc/ |
A D | emmc_chal_sd.h | 169 int32_t chal_sd_start(CHAL_HANDLE *sdHandle, uint32_t mode, 171 int32_t chal_sd_config(CHAL_HANDLE *sdHandle, uint32_t speed, 174 int32_t chal_sd_stop(void); 175 int32_t chal_sd_set_dma(CHAL_HANDLE *sdHandle, uint32_t mode); 177 int32_t chal_sd_config_bus_width(CHAL_HANDLE *sdHandle, int32_t width); 181 int32_t chal_sd_set_clock(CHAL_HANDLE *sdHandle, 185 uint32_t length, int32_t dir); 192 int32_t chal_sd_clear_pending_irq(CHAL_HANDLE *sdHandle); 193 int32_t chal_sd_get_irq_status(CHAL_HANDLE *sdHandle); 196 int32_t chal_sd_get_atuo12_error(CHAL_HANDLE *sdHandle); [all …]
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/tf-a-ffa_el3_spmc/include/drivers/ |
A D | scmi-msg.h | 118 int32_t plat_scmi_clock_rates_array(unsigned int agent_id, unsigned int scmi_id, 129 int32_t plat_scmi_clock_rates_by_step(unsigned int agent_id, 149 int32_t plat_scmi_clock_set_rate(unsigned int agent_id, unsigned int scmi_id, 158 int32_t plat_scmi_clock_get_state(unsigned int agent_id, unsigned int scmi_id); 167 int32_t plat_scmi_clock_set_state(unsigned int agent_id, unsigned int scmi_id, 194 int32_t plat_scmi_rstd_autonomous(unsigned int agent_id, unsigned int scmi_id, 204 int32_t plat_scmi_rstd_set_state(unsigned int agent_id, unsigned int scmi_id,
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/tf-a-ffa_el3_spmc/drivers/renesas/common/io/ |
A D | io_memdrv.c | 20 static int32_t memdrv_dev_open(const uintptr_t dev __attribute__ ((unused)), 22 static int32_t memdrv_dev_close(io_dev_info_t *dev_info); 42 static int32_t memdrv_block_open(io_dev_info_t *dev_info, const uintptr_t spec, in memdrv_block_open() 66 static int32_t memdrv_block_seek(io_entity_t *entity, int32_t mode, in memdrv_block_seek() 78 static int32_t memdrv_block_read(io_entity_t *entity, uintptr_t buffer, in memdrv_block_read() 101 static int32_t memdrv_block_close(io_entity_t *entity) in memdrv_block_close() 131 static int32_t memdrv_dev_open(const uintptr_t dev __attribute__ ((unused)), in memdrv_dev_open() 139 static int32_t memdrv_dev_close(io_dev_info_t *dev_info) in memdrv_dev_close() 144 int32_t rcar_register_io_dev_memdrv(const io_dev_connector_t **dev_con) in rcar_register_io_dev_memdrv() 146 int32_t result; in rcar_register_io_dev_memdrv()
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A D | io_emmcdrv.c | 21 static int32_t emmcdrv_dev_open(const uintptr_t spec __attribute__ ((unused)), 23 static int32_t emmcdrv_dev_close(io_dev_info_t *dev_info); 41 static int32_t emmcdrv_block_seek(io_entity_t *entity, int32_t mode, in emmcdrv_block_seek() 53 static int32_t emmcdrv_block_read(io_entity_t *entity, uintptr_t buffer, in emmcdrv_block_read() 58 int32_t result = IO_SUCCESS; in emmcdrv_block_read() 83 static int32_t emmcdrv_block_open(io_dev_info_t *dev_info, in emmcdrv_block_open() 127 static int32_t emmcdrv_block_close(io_entity_t *entity) in emmcdrv_block_close() 156 static int32_t emmcdrv_dev_open(const uintptr_t spec __attribute__ ((unused)), in emmcdrv_dev_open() 164 static int32_t emmcdrv_dev_close(io_dev_info_t *dev_info) in emmcdrv_dev_close() 169 int32_t rcar_register_io_dev_emmcdrv(const io_dev_connector_t **dev_con) in rcar_register_io_dev_emmcdrv() [all …]
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A D | io_rcar.h | 10 int32_t rcar_register_io_dev(const io_dev_connector_t **dev_con); 11 int32_t rcar_get_certificate(const int32_t name, uint32_t *cert);
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A D | io_rcar.c | 35 const int32_t name; 135 int32_t rcar_get_certificate(const int32_t name, uint32_t *cert) in rcar_get_certificate() 138 int32_t i; in rcar_get_certificate() 154 static int32_t file_to_offset(const int32_t name, uintptr_t *offset, in file_to_offset() 159 int32_t i; in file_to_offset() 303 int32_t rc; in load_bl33x() 305 const int32_t img[] = { in load_bl33x() 381 int32_t rc; in rcar_dev_init() 475 int32_t rc; in rcar_file_open() 542 int32_t rc; in rcar_file_read() [all …]
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/drivers/include/ |
A D | mce_private.h | 51 int32_t nvg_set_cstate_stat_query_value(uint64_t data); 53 int32_t nvg_is_sc7_allowed(void); 54 int32_t nvg_online_core(uint32_t core); 55 int32_t nvg_update_ccplex_gsc(uint32_t gsc_idx); 56 int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time); 57 int32_t nvg_roc_clean_cache_trbits(void);
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/drivers/bpmp_ipc/ |
A D | ivc.h | 33 int32_t tegra_ivc_init(struct ivc *ivc, uintptr_t rx_base, uintptr_t tx_base, 38 int32_t tegra_ivc_channel_notified(struct ivc *ivc); 40 int32_t tegra_ivc_write_advance(struct ivc *ivc); 42 int32_t tegra_ivc_write(struct ivc *ivc, const void *buf, size_t size); 43 int32_t tegra_ivc_read_advance(struct ivc *ivc); 45 int32_t tegra_ivc_read(struct ivc *ivc, void *buf, size_t max_read);
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/tf-a-ffa_el3_spmc/drivers/renesas/common/console/ |
A D | rcar_printf.h | 12 int32_t rcar_set_log_data(int32_t c); 13 int32_t rcar_log_init(void);
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/mce/ |
A D | ari.c | 85 int32_t ret = 0; in ari_request_wait() 139 int32_t ret = 0; in ari_enter_cstate() 200 int32_t ret = 0; in ari_update_crossover_time() 220 int32_t ret; in ari_read_cstate_stats() 254 int32_t ret; in ari_enumeration_misc() 279 int32_t ret; in ari_is_ccx_allowed() 300 int32_t ret, result; in ari_is_sc7_allowed() 331 int32_t ret; in ari_online_core() 430 int32_t ret; in ari_read_write_mca() 467 int32_t ret = 0; in ari_update_ccplex_gsc() [all …]
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A D | nvg.c | 19 int32_t nvg_enter_cstate(uint32_t ari_base, uint32_t state, uint32_t wake_time) in nvg_enter_cstate() 21 int32_t ret = 0; in nvg_enter_cstate() 47 int32_t nvg_update_cstate_info(uint32_t ari_base, uint32_t cluster, uint32_t ccplex, in nvg_update_cstate_info() 89 int32_t nvg_update_crossover_time(uint32_t ari_base, uint32_t type, uint32_t time) in nvg_update_crossover_time() 91 int32_t ret = 0; in nvg_update_crossover_time() 137 int32_t nvg_write_cstate_stats(uint32_t ari_base, uint32_t state, uint32_t stats) in nvg_write_cstate_stats() 163 int32_t nvg_is_ccx_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time) in nvg_is_ccx_allowed() 173 int32_t nvg_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time) in nvg_is_sc7_allowed() 176 int32_t ret; in nvg_is_sc7_allowed() 204 int32_t nvg_online_core(uint32_t ari_base, uint32_t core) in nvg_online_core() [all …]
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/drivers/mce/ |
A D | nvg.c | 101 int32_t nvg_is_sc7_allowed(void) in nvg_is_sc7_allowed() 107 return (int32_t)nvg_get_result(); in nvg_is_sc7_allowed() 116 int32_t nvg_online_core(uint32_t core) in nvg_online_core() 118 int32_t ret = 0; in nvg_online_core() 139 int32_t nvg_update_ccplex_gsc(uint32_t gsc_idx) in nvg_update_ccplex_gsc() 141 int32_t ret = 0; in nvg_update_ccplex_gsc() 158 int32_t nvg_roc_clean_cache_trbits(void) in nvg_roc_clean_cache_trbits() 160 int32_t ret = 0; in nvg_roc_clean_cache_trbits() 179 int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time) in nvg_enter_cstate() 181 int32_t ret = 0; in nvg_enter_cstate()
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A D | mce.c | 41 int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1, in mce_command_handler() 44 int32_t ret = 0; in mce_command_handler() 83 int32_t mce_update_gsc_videomem(void) in mce_update_gsc_videomem() 85 int32_t ret; in mce_update_gsc_videomem() 102 int32_t mce_update_gsc_tzdram(void) in mce_update_gsc_tzdram() 104 int32_t ret; in mce_update_gsc_tzdram() 177 int32_t ret = 0; in mce_enable_strict_checking()
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/tf-a-ffa_el3_spmc/drivers/scmi-msg/ |
A D | reset_domain.h | 43 int32_t status; 63 int32_t status; 85 int32_t status; 101 int32_t status; 109 int32_t status;
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A D | power_domain.h | 30 int32_t status; 40 int32_t status; 54 int32_t status; 69 int32_t status;
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A D | entry.c | 39 void scmi_status_response(struct scmi_msg *msg, int32_t status) in scmi_status_response() 41 assert(msg->out && msg->out_size >= sizeof(int32_t)); in scmi_status_response() 43 memcpy(msg->out, &status, sizeof(int32_t)); in scmi_status_response() 44 msg->out_size_out = sizeof(int32_t); in scmi_status_response() 54 assert(payload && size >= sizeof(int32_t) && size <= msg->out_size && in scmi_write_response() 55 msg->out && msg->out_size >= sizeof(int32_t)); in scmi_write_response()
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A D | clock.h | 42 int32_t status; 56 int32_t status; 89 int32_t status; 107 int32_t status; 145 int32_t status;
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/tf-a-ffa_el3_spmc/include/drivers/rambus/ |
A D | trng_ip_76.h | 14 int32_t eip76_rng_read_rand_buf(void *data, bool wait); 15 int32_t eip76_rng_probe(uintptr_t base_addr); 16 int32_t eip76_rng_get_random(uint8_t *data, uint32_t len);
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/tf-a-ffa_el3_spmc/plat/arm/board/juno/ |
A D | juno_common.c | 107 int32_t plat_is_smccc_feature_available(u_register_t fid) in plat_is_smccc_feature_available() 118 int32_t plat_get_soc_version(void) in plat_get_soc_version() 120 return (int32_t) in plat_get_soc_version() 127 int32_t plat_get_soc_revision(void) in plat_get_soc_revision() 132 return (int32_t)(((sys_id >> V2M_SYS_ID_REV_SHIFT) & in plat_get_soc_revision()
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/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/pm_service/ |
A D | pm_api_clock.c | 233 int32_t (*parents)[]; 835 .parents = &((int32_t []) { 861 .parents = &((int32_t []) { 873 .parents = &((int32_t []) { 891 .parents = &((int32_t []) { 911 .parents = &((int32_t []) { 937 .parents = &((int32_t []) { 949 .parents = &((int32_t []) { 967 .parents = &((int32_t []) { 987 .parents = &((int32_t []) { [all …]
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/tf-a-ffa_el3_spmc/drivers/arm/dcc/ |
A D | dcc_console.c | 74 static int32_t dcc_status_timeout(uint32_t mask) in dcc_status_timeout() 92 static int32_t dcc_console_putc(int32_t ch, struct console *console) in dcc_console_putc() 105 static int32_t dcc_console_getc(struct console *console) in dcc_console_getc() 117 int32_t dcc_console_init(unsigned long base_addr, uint32_t uart_clk, in dcc_console_init()
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/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/drivers/se/ |
A D | se.c | 56 int32_t ret = 0; in tegra_se_is_operation_complete() 100 int32_t ret = 0; in tegra_se_is_ready() 141 static int32_t tegra_se_save_context(void) in tegra_se_save_context() 143 int32_t ret = -ECANCELED; in tegra_se_save_context() 236 int32_t ret = 0; in tegra_se_start_normal_operation() 276 int32_t ret = 0; in tegra_se_calculate_sha256_hash() 388 int32_t ret; in tegra_se_save_sha256_pmc_scratch() 415 int32_t val = 0; in tegra_se_calculate_save_sha256() 453 int32_t tegra_se_suspend(void) in tegra_se_suspend() 455 int32_t ret = 0; in tegra_se_suspend() [all …]
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/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/driver/ |
A D | usb_phy.c | 130 int32_t status; in usb3h_u2_phy_power_on() 163 int32_t status; in usb3h_u3_phy_power_on() 186 int32_t status; in drdu3_u2_phy_power_on() 221 int32_t status; in drdu3_u3_phy_power_on() 244 int32_t status; in drdu2_u2_phy_power_on() 311 int32_t status; in u3h_u2drd_phy_power_on() 389 int32_t status; in u3drd_phy_power_on() 480 int32_t index; in usb_info_fill() 506 int32_t status; in usb_phy_init() 566 int32_t status; in usb_xhci_init() [all …]
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