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/tf-a-ffa_el3_spmc/drivers/imx/usdhc/
A Dimx_usdhc.c113 unsigned int xfertype = 0, mixctl = 0, multiple = 0, data = 0, err = 0; in imx_usdhc_send_cmd() local
138 multiple = 1; in imx_usdhc_send_cmd()
146 multiple = 1; in imx_usdhc_send_cmd()
155 if (multiple) { in imx_usdhc_send_cmd()
/tf-a-ffa_el3_spmc/
A DPROTOTYPE_README170 4) Share multiple pages requiring the memory descriptor to be split
171 over multiple invocations.
174 6) Lend multiple pages requiring the memory descriptor to be split
175 over multiple invocations.
/tf-a-ffa_el3_spmc/docs/security_advisories/
A Dsecurity-advisory-tfv-8.rst57 In the presence of multiple normal world SMC clients, this behaviour might leak
64 multiple normal world SMC clients lies with EL2 software. When present, EL2
A Dsecurity-advisory-tfv-1.rst93 blocks over multiple SMCs. ``block_size`` is an SMC argument and therefore
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dimage-terminology.rst72 potentially multiple SPs and there is no concept of a primary SP, this
115 SCP needs to load/authenticate multiple 3rd level images in future.
135 During firmware update, there are (potentially) multiple transitions between the
A Drt-svc-writers-guide.rst285 Services that contain multiple sub-services
288 It is possible that a single owning entity implements multiple sub-services. For
/tf-a-ffa_el3_spmc/docs/process/
A Dcoding-style.rst124 to insert this automatically and to trim multiple blank lines at the end of the
209 Use lowercase for function names, separating multiple words with an underscore
224 lowercase with underscore separation between multiple words. An example is
310 * they separate multiple contexts.
A Dfaq.rst10 If you need to modify an existing patch set with multiple commits, refer to the
A Dcontributing.rst61 There might be multiple ``Signed-off-by:`` lines, depending on the history
103 - For topics with multiple commits, you should make all documentation changes
/tf-a-ffa_el3_spmc/docs/components/
A Dffa-manifest-binding.rst164 - Count of pages of memory region as a multiple of the translation granule
217 - On systems with multiple System Memory Management Units (SMMUs) this
A Ddebugfs-design.rst102 might be split into multiple read operations of smaller chunks.
A Dcot-binding.rst218 method. In future, there may be multiple methods can
A Dromlib-design.rst78 files for the "library at ROM" to work. It implements multiple functions:
A Dfirmware-update.rst223 block or multiple blocks. In either case, the total size of the image must be
236 When using multiple blocks, the source blocks do not necessarily need to be in
A Dsecure-partition-manager-mm.rst68 Furthermore, multiple Secure Partitions can be used to isolate unrelated
72 Armv8-A software stack. A single or multiple Secure Partitions provide secure
244 amongst multiple software components in the Secure world or cannot be directly
A Dsecure-partition-manager.rst120 and SPMC, one or multiple secure partitions, with an optional
146 is required when ``SPMD_SPM_AT_SEL2`` is enabled hence when multiple
444 The multiple-signing domain feature (in current state dual signing domain `[8]`_) allows
/tf-a-ffa_el3_spmc/docs/components/fconf/
A Dindex.rst122 across multiple platforms. They should be globally accessible and defined
/tf-a-ffa_el3_spmc/docs/plat/
A Dnvidia-tegra.rst77 Tegra supports multiple Trusted OS'.
A Drz-g2.rst13 level. Plug-ins are available for multiple open-source software tools.
A Drcar-gen3.rst10 level. Plug-ins are available for multiple open-source software tools.
/tf-a-ffa_el3_spmc/docs/design/
A Dauth-framework.rst204 multiple CoTs then it should be verified only once e.g. the Trusted World
281 If a data image uses multiple methods, then all the methods must be a part of
306 should allow the Cryptography Library (CL) to support multiple hash
356 The PP is responsible for defining a single or multiple CoTs for a data image.
A Dfirmware-design.rst2013 shareability, cacheability and memory attributes is accessed by multiple CPUs
2054 accessed by multiple CPUs, either with caches enabled or disabled.
2091 The field ``local_state`` can be concurrently accessed by multiple CPUs in
2100 and is accessed by multiple CPUs with mismatched attributes. ``bakery_lock_t`` is
2119 ``bakery_lock_t`` structure for multiple CPUs may exist on a single cache line.
2120 These per-CPU fields can be read and written during lock contention by multiple
2490 system with multiple CPUs, each timestamp is captured and stored
2598 Common not Private (TTBRn_ELx.CnP) bit is enabled to indicate that multiple
/tf-a-ffa_el3_spmc/docs/plat/arm/
A Darm-build-options.rst147 particular SGI/RD platform may have multiple variants which may differ in
/tf-a-ffa_el3_spmc/docs/
A Dchange-log.rst1156 - Fixed compilation warnings caused by multiple Makefile inclusions
1298 Add support for probing multiple GIC Redistributor frames
1307 - scmi: Allow use of multiple SCMI channels
1717 multiple definition of ipc_handle, missing inclusion of cdefs.h, and
1833 - console: Allow the console to register multiple times
2356 rework as the specifications change. It has basic support for multiple
2869 - Extend FIP io driver to support multiple FIP devices
3462 have multiple threads which might need powering down individually.
3487 requested at multiple power levels.
3670 enabling TF-A to be compiled to support multiple Arm platforms and
[all …]
/tf-a-ffa_el3_spmc/docs/threat_model/
A Dthreat_model_spm.rst19 isolation of services from multiple vendors.

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