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/tf-a-ffa_el3_spmc/include/plat/marvell/armada/common/
A Dmvebu.h16 #define IS_NOT_ALIGN(number, align) ((number) & ((align) - 1)) argument
19 #define ALIGN_UP(number, align) (((number) & ((align) - 1)) ? \ argument
20 (((number) + (align)) & ~((align)-1)) : (number))
23 #define IS_POWER_OF_2(number) ((number) != 0 && \ argument
24 (((number) & ((number) - 1)) == 0))
32 #define ROUND_UP_TO_POW_OF_2(number) (1 << \ argument
33 (32 - __builtin_clz((number) - 1)))
/tf-a-ffa_el3_spmc/docs/components/
A Dffa-manifest-binding.rst17 by this node. The minor number is incremented if the binding changes in a
20 - X is an integer representing the major version number of this document.
21 - Y is an integer representing the minor version number of this document.
54 - In the absence of virtualization, this is the number of execution
56 - If value of this field = 1 and number of PEs > 1 then the partition is
59 capable partition irrespective of the number of PEs.
98 - A unique number amongst all partitions that specifies if this partition
99 must be booted before others. The partition with the smaller number will be
140 The field specifies the general purpose register number but not its width.
142 the partition properties. For example, if the number value is 1 then the
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A Dsdei.rst32 the SDEI dispatcher returns a platform dynamic event number [2]. The client then
64 - The event number: this must be a positive 32-bit integer.
66 - For an event that has a backing interrupt, the interrupt number the event is
76 macro takes only one parameter: an SGI number to signal other PEs.
82 - The event number (as above);
113 - Both arrays must be sorted in the increasing order of event number.
225 The parameter ``ev_num`` is the event number to dispatch. The API returns ``0``
A Darm-sip-service.rst256 This operation reads a number of bytes from a file descriptor obtained by
280 uint32_t w1: number of bytes read on success.
424 value with major version number in upper 16 bits and
A Dras.rst65 register-accessed record, the start index of the record and number of
153 - Interrupt number;
164 interrupt number. This allows for fast look of handlers in order to service RAS
219 with the interrupt number. That error handler for that record is then invoked to
A Dxlat-tables-lib-v2-design.rst132 * The maximum number of `mmap` regions to map.
136 * The number of sub-translation tables to allocate.
141 specify the number of level-2 and level-3 translation tables to pre-allocate
147 will incidentally determine the number of entries in the initial lookup level
160 - number of `mmap` regions: ``MAX_MMAP_REGIONS``;
161 - number of sub-translation tables: ``MAX_XLAT_TABLES``;
347 number of translation tables created to satisfy the user's request. It will
/tf-a-ffa_el3_spmc/docs/design/
A Dpsci-pd-tree.rst19 code is not scalable. The use of an MPIDR also restricts the number of
57 #. The first entry in the array specifies the number of power domains at the
62 #. Each subsequent entry corresponds to a power domain and contains the number
65 #. The size of the array minus the first entry will be equal to the number of
68 #. The value in each entry in the array is used to find the number of entries
69 to consider at the next level. The sum of the values (number of children) of
70 all the entries at a level specifies the number of entries in the array for
125 unique number (core index) between ``0`` and ``PLAT_CORE_COUNT - 1`` to each core
150 For platforms where the number of allocated MPIDRs is equal to the number of
158 used by the platform is not equal to the number of core power domains.
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/tf-a-ffa_el3_spmc/fdts/
A Dfvp-base-gicv3-psci-common.dtsi57 * 1. Event number
58 * 2. Interrupt number the event is bound to or
80 * 1. Interrupt number
184 frame-number = <1>;
A Dfvp-foundation-gicv2-psci.dts123 frame-number = <1>;
A Dfvp-foundation-gicv3-psci.dts132 frame-number = <1>;
A Dcorstone700.dtsi107 frame-number = <0>;
A Dfvp-base-gicv2-psci.dts122 frame-number = <1>;
A Da5ds.dts134 frame-number = <0>;
A Dfvp-base-gicv2-psci-aarch32.dts123 frame-number = <1>;
A Dfvp-base-gicv3-psci-aarch32-common.dtsi124 frame-number = <1>;
/tf-a-ffa_el3_spmc/docs/plat/marvell/armada/misc/
A Dmvebu-ccu.rst12 Return the CCU windows configuration and the number of windows of the
A Dmvebu-amb.rst39 Returns the AMB windows configuration and the number of windows
A Dmvebu-io-win.rst23 Returns the IO windows configuration and the number of windows of the
A Dmvebu-iob.rst17 Returns the IOB windows configuration and the number of windows
/tf-a-ffa_el3_spmc/plat/allwinner/common/
A Darisc_off.S19 # It expects the core number presented as a mask in the upper half of
69 l.ff1 r6, r3 # get core number from high mask
71 l.slli r6, r6, 2 # r5: core number*4 (0-12)
/tf-a-ffa_el3_spmc/docs/resources/diagrams/plantuml/
A Dsdei_general.puml16 EL3->EL2: event number: ev
/tf-a-ffa_el3_spmc/docs/plat/
A Drockchip.rst4 Trusted Firmware-A supports a number of Rockchip ARM SoCs from both
A Dstm32mp1.rst26 The `STM32MP1 part number codification`_ page gives more information about part numbers.
151 .. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#P…
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dimage-terminology.rst23 suffixed with a dash ("-") followed by a number (for example, ``BL3-1``) or a
24 subscript number, depending on whether rich text formatting was available.
89 identifier, not a number.
/tf-a-ffa_el3_spmc/docs/security_advisories/
A Dsecurity-advisory-tfv-5.rst30 Performance Monitors implementation, including the number of counters

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