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Searched refs:pin (Results 1 – 23 of 23) sorted by relevance

/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/gpio/
A Dmtgpio.c148 switch (pin) { in gpio_get_pull_iocfg()
184 switch (pin) { in gpio_get_pupd_iocfg()
200 switch (pin) { in gpio_get_pupd_offset()
370 uint32_t pin; in mt_get_gpio_dir() local
378 uint32_t pin; in mt_set_gpio_pull() local
386 uint32_t pin; in mt_get_gpio_pull() local
394 uint32_t pin; in mt_set_gpio_out() local
402 uint32_t pin; in mt_get_gpio_out() local
410 uint32_t pin; in mt_get_gpio_in() local
418 uint32_t pin; in mt_set_gpio_mode() local
[all …]
/tf-a-ffa_el3_spmc/plat/mediatek/common/drivers/gpio/
A Dmtgpio_common.c32 assert(pin < MAX_GPIO_PIN); in mt_set_gpio_dir_chip()
248 uint32_t pin; in mt_get_gpio_dir() local
250 pin = (uint32_t)gpio; in mt_get_gpio_dir()
256 uint32_t pin; in mt_set_gpio_pull() local
258 pin = (uint32_t)gpio; in mt_set_gpio_pull()
264 uint32_t pin; in mt_get_gpio_pull() local
266 pin = (uint32_t)gpio; in mt_get_gpio_pull()
272 uint32_t pin; in mt_set_gpio_out() local
274 pin = (uint32_t)gpio; in mt_set_gpio_out()
280 uint32_t pin; in mt_get_gpio_in() local
[all …]
A Dmtgpio_common.h108 uintptr_t mt_gpio_find_reg_addr(uint32_t pin);
/tf-a-ffa_el3_spmc/drivers/st/gpio/
A Dstm32_gpio.c99 uint32_t pin; in dt_set_gpio_config() local
209 assert(pin <= GPIO_PIN_MAX); in set_gpio()
214 ((uint32_t)GPIO_MODE_MASK << (pin << 1))); in set_gpio()
216 (mode & ~GPIO_OPEN_DRAIN) << (pin << 1)); in set_gpio()
232 if (pin < GPIO_ALT_LOWER_LIMIT) { in set_gpio()
236 alternate << (pin << 2)); in set_gpio()
240 ((pin - GPIO_ALT_LOWER_LIMIT) << 2))); in set_gpio()
260 stm32mp_register_secure_gpio(bank, pin); in set_gpio()
261 set_gpio_secure_cfg(bank, pin, true); in set_gpio()
265 set_gpio_secure_cfg(bank, pin, false); in set_gpio()
[all …]
/tf-a-ffa_el3_spmc/plat/st/common/include/
A Dstm32mp_shared_resources.h33 void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin);
34 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin);
49 unsigned int pin __unused) in stm32mp_register_secure_gpio()
54 unsigned int pin __unused) in stm32mp_register_non_secure_gpio()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/gpio/
A Dmtgpio.c11 uintptr_t mt_gpio_find_reg_addr(uint32_t pin) in mt_gpio_find_reg_addr() argument
16 assert(pin < MAX_GPIO_PIN); in mt_gpio_find_reg_addr()
18 gpio_info = mt_pin_infos[pin]; in mt_gpio_find_reg_addr()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/gpio/
A Dmtgpio.c11 uintptr_t mt_gpio_find_reg_addr(uint32_t pin) in mt_gpio_find_reg_addr() argument
16 assert(pin < MAX_GPIO_PIN); in mt_gpio_find_reg_addr()
18 gpio_info = mt_pin_infos[pin]; in mt_gpio_find_reg_addr()
/tf-a-ffa_el3_spmc/plat/allwinner/common/
A Dsunxi_common.c84 void sunxi_set_gpio_out(char port, int pin, bool level_high) in sunxi_set_gpio_out() argument
97 mmio_setbits_32(port_base + 0x10, BIT(pin)); in sunxi_set_gpio_out()
99 mmio_clrbits_32(port_base + 0x10, BIT(pin)); in sunxi_set_gpio_out()
102 mmio_clrsetbits_32(port_base + (pin / 8) * 4, in sunxi_set_gpio_out()
103 0x7 << ((pin % 8) * 4), in sunxi_set_gpio_out()
104 0x1 << ((pin % 8) * 4)); in sunxi_set_gpio_out()
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dstm32mp1_shared_resources.c314 void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin) in stm32mp_register_secure_gpio() argument
318 register_periph(STM32MP1_SHRES_GPIOZ(pin), SHRES_SECURE); in stm32mp_register_secure_gpio()
326 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin) in stm32mp_register_non_secure_gpio() argument
330 register_periph(STM32MP1_SHRES_GPIOZ(pin), SHRES_NON_SECURE); in stm32mp_register_non_secure_gpio()
559 uint32_t pin; in set_gpio_secure_configuration() local
561 for (pin = 0U; pin < get_gpioz_nbpin(); pin++) { in set_gpio_secure_configuration()
562 bool secure_state = periph_is_secure(STM32MP1_SHRES_GPIOZ(pin)); in set_gpio_secure_configuration()
564 set_gpio_secure_cfg(GPIO_BANK_Z, pin, secure_state); in set_gpio_secure_configuration()
/tf-a-ffa_el3_spmc/drivers/brcm/
A Diproc_gpio.c33 #define GPIO_BANK(pin) ((pin) / NGPIOS_PER_BANK) argument
35 #define IPROC_GPIO_REG(pin, reg) (GPIO_BANK(pin) * GPIO_BANK_SIZE + (reg)) argument
36 #define IPROC_GPIO_SHIFT(pin) ((pin) % NGPIOS_PER_BANK) argument
/tf-a-ffa_el3_spmc/plat/xilinx/versal/pm_service/
A Dpm_api_sys.h44 enum pm_ret_status pm_pinctrl_request(uint32_t pin, uint32_t flag);
45 enum pm_ret_status pm_pinctrl_release(uint32_t pin, uint32_t flag);
46 enum pm_ret_status pm_pinctrl_set_function(uint32_t pin, uint32_t function,
48 enum pm_ret_status pm_pinctrl_get_function(uint32_t pin, uint32_t *function,
50 enum pm_ret_status pm_pinctrl_set_pin_param(uint32_t pin, uint32_t param,
52 enum pm_ret_status pm_pinctrl_get_pin_param(uint32_t pin, uint32_t param,
A Dpm_api_sys.c390 enum pm_ret_status pm_pinctrl_request(uint32_t pin, uint32_t flag) in pm_pinctrl_request() argument
396 pin); in pm_pinctrl_request()
409 enum pm_ret_status pm_pinctrl_release(uint32_t pin, uint32_t flag) in pm_pinctrl_release() argument
415 pin); in pm_pinctrl_release()
429 enum pm_ret_status pm_pinctrl_set_function(uint32_t pin, uint32_t function, in pm_pinctrl_set_function() argument
436 PM_PINCTRL_SET_FUNCTION, pin, function) in pm_pinctrl_set_function()
457 PM_PINCTRL_SET_FUNCTION, pin); in pm_pinctrl_get_function()
472 enum pm_ret_status pm_pinctrl_set_pin_param(uint32_t pin, uint32_t param, in pm_pinctrl_set_pin_param() argument
479 PM_PINCTRL_CONFIG_PARAM_SET, pin, param, value); in pm_pinctrl_set_pin_param()
494 enum pm_ret_status pm_pinctrl_get_pin_param(uint32_t pin, uint32_t param, in pm_pinctrl_get_pin_param() argument
[all …]
/tf-a-ffa_el3_spmc/include/drivers/st/
A Dstm32_gpio.h52 void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed,
54 void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure);
/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/pm_service/
A Dpm_api_sys.h126 enum pm_ret_status pm_pinctrl_request(unsigned int pin);
127 enum pm_ret_status pm_pinctrl_release(unsigned int pin);
128 enum pm_ret_status pm_pinctrl_get_function(unsigned int pin,
130 enum pm_ret_status pm_pinctrl_set_function(unsigned int pin,
132 enum pm_ret_status pm_pinctrl_get_config(unsigned int pin,
135 enum pm_ret_status pm_pinctrl_set_config(unsigned int pin,
A Dpm_api_sys.c660 enum pm_ret_status pm_pinctrl_request(unsigned int pin) in pm_pinctrl_request() argument
665 PM_PACK_PAYLOAD2(payload, PM_PINCTRL_REQUEST, pin); in pm_pinctrl_request()
677 enum pm_ret_status pm_pinctrl_release(unsigned int pin) in pm_pinctrl_release() argument
682 PM_PACK_PAYLOAD2(payload, PM_PINCTRL_RELEASE, pin); in pm_pinctrl_release()
699 PM_PACK_PAYLOAD2(payload, PM_PINCTRL_GET_FUNCTION, pin); in pm_pinctrl_get_function()
710 enum pm_ret_status pm_pinctrl_set_function(unsigned int pin, unsigned int fid) in pm_pinctrl_set_function() argument
715 PM_PACK_PAYLOAD3(payload, PM_PINCTRL_SET_FUNCTION, pin, fid); in pm_pinctrl_set_function()
729 enum pm_ret_status pm_pinctrl_get_config(unsigned int pin, in pm_pinctrl_get_config() argument
735 PM_PACK_PAYLOAD3(payload, PM_PINCTRL_CONFIG_PARAM_GET, pin, param); in pm_pinctrl_get_config()
747 enum pm_ret_status pm_pinctrl_set_config(unsigned int pin, in pm_pinctrl_set_config() argument
[all …]
A Dpm_api_pinctrl.h716 enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin,
A Dpm_api_pinctrl.c2649 enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin, in pm_api_pinctrl_get_pin_groups() argument
2656 if (pin >= MAX_PIN) in pm_api_pinctrl_get_pin_groups()
2661 grps = *zynqmp_pin_groups[pin].groups; in pm_api_pinctrl_get_pin_groups()
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/gpio/
A Drk3399_gpio.c62 #define GET_GPIO_PORT(pin) (pin / 32) argument
63 #define GET_GPIO_NUM(pin) (pin % 32) argument
64 #define GET_GPIO_BANK(pin) ((pin % 32) / 8) argument
65 #define GET_GPIO_ID(pin) ((pin % 32) % 8) argument
/tf-a-ffa_el3_spmc/plat/allwinner/common/include/
A Dsunxi_private.h40 void sunxi_set_gpio_out(char port, int pin, bool level_high);
/tf-a-ffa_el3_spmc/docs/plat/
A Dstm32mp1.rst13 The STM32MP1 series is available in 3 different lines which are pin-to-pin compatible:
/tf-a-ffa_el3_spmc/fdts/
A Dstm32mp151.dtsi489 pinctrl: pin-controller@50002000 {
620 pinctrl_z: pin-controller-z@54004000 {
/tf-a-ffa_el3_spmc/docs/plat/marvell/armada/
A Dporting.rst76 Press reset and keep pressing the button connected to the chosen GPIO pin. A
/tf-a-ffa_el3_spmc/docs/
A Dchange-log.rst1445 EEMI, PLL related PM, clock related PM, pin control related PM, reset related
1604 QSPI flash instance, update for FMC2 pin muxing, and reduce MAX_XLAT_TABLES

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