| /tf-a-ffa_el3_spmc/lib/coreboot/ |
| A D | coreboot_table.c | 97 coreboot_memrange_t *range = &coreboot_memranges[i]; in coreboot_get_memory_type() local
99 if (range->type == CB_MEM_NONE) in coreboot_get_memory_type()
101 if ((start >= range->start) && in coreboot_get_memory_type()
102 (start - range->start < range->size) && in coreboot_get_memory_type()
103 (size <= range->size - (start - range->start))) { in coreboot_get_memory_type()
104 return range->type; in coreboot_get_memory_type()
|
| /tf-a-ffa_el3_spmc/fdts/ |
| A D | fvp-ve-Cortex-A5x1.dts | 69 freq-range = <50000000 100000000>;
78 freq-range = <5000000 50000000>;
87 freq-range = <80000000 120000000>;
96 freq-range = <23750000 165000000>;
105 freq-range = <80000000 80000000>;
114 freq-range = <25000000 60000000>;
|
| A D | n1sdp.dtsi | 159 bus-range = <0 17>;
182 bus-range = <0 17>;
|
| A D | n1sdp-multi-chip.dts | 73 bus-range = <0 0xff>;
|
| A D | rtsm_ve-motherboard.dtsi | 209 freq-range = <23750000 63500000>;
|
| A D | rtsm_ve-motherboard-aarch32.dtsi | 210 freq-range = <23750000 63500000>;
|
| /tf-a-ffa_el3_spmc/plat/renesas/common/ |
| A D | plat_pm.c | 50 unsigned long range; in rcar_program_mailbox() local
53 range = (unsigned long)&rcar_mboxes[linear_id]; in rcar_program_mailbox()
55 flush_dcache_range(range, sizeof(range)); in rcar_program_mailbox()
|
| /tf-a-ffa_el3_spmc/tools/marvell/doimage/secure/ |
| A D | sec_img_7K.cfg | 14 # index of CSK key in the array. Valid range is 0 to 15
|
| A D | sec_img_8K.cfg | 14 # index of CSK key in the array. Valid range is 0 to 15
|
| /tf-a-ffa_el3_spmc/docs/getting_started/ |
| A D | rt-svc-writers-guide.rst | 38 are allocated a range of of OENs. The OEN must be interpreted in conjunction
63 range as they need - it is not necessary to coordinate with other entities of
65 within the SiP Service calls OEN range to mean different things - as these
92 the name of the service, the range of OENs covered, the type of service and
290 ``0xC4000000``-``0xC400FFFF`` functions. Within that range, the `PSCI`_ service
|
| A D | psci-lib-integration-guide.rst | 253 PSCI service range specified in `SMCCC`_. The function ID ``smc_fid`` (first
|
| /tf-a-ffa_el3_spmc/docs/design/ |
| A D | psci-pd-tree.rst | 157 MPIDRs have been sparsely allocated, that is, the size of the range of MPIDRs
171 is equal to the size of the range of MPIDRs allocated. This approach will
199 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
|
| A D | firmware-design.rst | 884 Each implemented service handles a range of SMC function identifiers as
891 the name of the service, the range of OENs covered, the type of service and
933 #. Multiple descriptors for the same range of OENs and ``call_type``
934 #. Incorrect range of owning entity numbers for a given ``call_type``
945 128 distinct services, but in practice a single descriptor can cover a range of
2067 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
|
| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/dram/ |
| A D | dram_spec_timing.h | 59 #define range(mi, val, ma) (((ma) > (val)) ? (max(mi, val)) : (ma)) macro
|
| /tf-a-ffa_el3_spmc/lib/romlib/ |
| A D | romlib_generator.py | 211 for item_index in range(0, len(index_file_parser.items)):
|
| /tf-a-ffa_el3_spmc/docs/security_advisories/ |
| A D | security-advisory-tfv-7.rst | 77 ``SMCCC_ARCH_WORKAROUND_2`` in the Arm architectural range to allow callers at
|
| A D | security-advisory-tfv-4.rst | 48 range. Therefore, any AArch32 code relying on this macro to detect such integer
|
| /tf-a-ffa_el3_spmc/docs/plat/ |
| A D | rz-g2.rst | 12 cover the full product range, from the premium class to the entry
|
| A D | rcar-gen3.rst | 9 cover the full product range, from the premium class to the entry
|
| /tf-a-ffa_el3_spmc/docs/plat/marvell/armada/ |
| A D | build.rst | 97 for SRAM address range at BL31 execution stage with window target set to DRAM-0.
129 values with CP_NUM are in a range of 1 to 3.
|
| /tf-a-ffa_el3_spmc/docs/components/ |
| A D | arm-sip-service.rst | 12 - Use SMC function IDs that fall in the SiP range, which are ``0xc2000000`` -
|
| A D | secure-partition-manager-mm.rst | 62 - A range of synchronous exceptions (e.g. SMC function identifiers).
307 Secure Service calls range (see `SMC Calling Convention`_ (*Arm DEN 0028B*)
|
| A D | exception-handling.rst | 198 choosing *n* bits for priority range assignment, the platform must ensure
|
| /tf-a-ffa_el3_spmc/docs/plat/arm/ |
| A D | arm-build-options.rst | 149 to select the appropriate platform variant for the build. The range of
|
| /tf-a-ffa_el3_spmc/docs/ |
| A D | change-log.rst | 1297 - gicv3: Introduce makefile, Add extended PPI and SPI range,
1312 - coreboot: Add memory range parsing and use generic base address
2105 - gicv3: Fix support for full SPI range
3032 52-bit Physical Address range.
3064 - Disabled the higher VA range to avoid unpredictable behaviour if there is
3065 an attempt to access addresses in the higher VA range.
|