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Searched refs:reg_num (Results 1 – 8 of 8) sorted by relevance

/tf-a-ffa_el3_spmc/drivers/arm/gic/v3/
A Dgicv3_private.h383 unsigned int reg_num) in gicr_read_icenabler() argument
423 return mmio_read_32(base + GICR_ICFGR + (reg_num << 2)); in gicr_read_icfgr()
429 mmio_write_32(base + GICR_ICFGR + (reg_num << 2), val); in gicr_write_icfgr()
447 mmio_write_32(base + GICR_ICPENDR + (reg_num << 2), val); in gicr_write_icpendr()
468 unsigned int reg_num) in gicr_read_igroupr() argument
476 mmio_write_32(base + GICR_IGROUPR + (reg_num << 2), val); in gicr_write_igroupr()
497 unsigned int reg_num) in gicr_read_igrpmodr() argument
513 unsigned int reg_num) in gicr_ipriorityr_read() argument
542 unsigned int reg_num) in gicr_read_isactiver() argument
571 unsigned int reg_num) in gicr_read_isenabler() argument
[all …]
/tf-a-ffa_el3_spmc/plat/xilinx/versal/pm_service/
A Dpm_client.c120 uint32_t reg_num; in pm_client_set_wakeup_sources() local
127 for (reg_num = 0; reg_num < NUM_GICD_ISENABLER; reg_num++) { in pm_client_set_wakeup_sources()
128 uint32_t base_irq = reg_num << ISENABLER_SHIFT; in pm_client_set_wakeup_sources()
129 uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2)); in pm_client_set_wakeup_sources()
/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/pm_service/
A Dpm_client.c178 uint32_t reg_num; in pm_client_set_wakeup_sources() local
197 for (reg_num = 0; reg_num < NUM_GICD_ISENABLER; reg_num++) { in pm_client_set_wakeup_sources()
198 uint32_t base_irq = reg_num << ISENABLER_SHIFT; in pm_client_set_wakeup_sources()
199 uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2)); in pm_client_set_wakeup_sources()
/tf-a-ffa_el3_spmc/plat/mediatek/common/
A Dmtk_cirq.c223 cirq_all_events.table[cirq_reg].reg_num = cirq_reg; in collect_all_wakeup_events()
325 mmio_write_32(CIRQ_SENS_CLR_BASE + (reg->reg_num * 4U), in __cirq_fast_clone()
342 cirq_id = (reg->reg_num << 5U) + cirq_bit; in __cirq_fast_clone()
511 (reg->reg_num << 2U)); in cirq_fast_sw_flush()
522 cirq_id = (reg->reg_num << 5U) + cirq_bit; in cirq_fast_sw_flush()
A Dmtk_cirq.h102 uint32_t reg_num; member
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/apusys/
A Dmtk_apusys_apc.c142 uint32_t reg_num; in dump_apusys_noc_dapc() local
145 reg_num = APUSYS_NOC_DAPC_AO_SLAVE_NUM / in dump_apusys_noc_dapc()
148 for (i = 0U; i <= reg_num; i++) { in dump_apusys_noc_dapc()
430 uint32_t reg_num; in dump_apusys_ao_apc() local
433 reg_num = APUSYS_APC_SYS0_AO_SLAVE_NUM / in dump_apusys_ao_apc()
436 for (i = 0U; i <= reg_num; i++) { in dump_apusys_ao_apc()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/devapc/
A Ddevapc.c2466 int reg_num; in dump_infra_ao_apc() local
2471 for (i = 0; i <= reg_num; i++) { in dump_infra_ao_apc()
2482 for (i = 0; i <= reg_num; i++) { in dump_infra_ao_apc()
2493 for (i = 0; i <= reg_num; i++) { in dump_infra_ao_apc()
2508 int reg_num; in dump_peri_ao_apc() local
2513 for (i = 0; i <= reg_num; i++) { in dump_peri_ao_apc()
2524 for (i = 0; i <= reg_num; i++) { in dump_peri_ao_apc()
2535 for (i = 0; i <= reg_num; i++) { in dump_peri_ao_apc()
2550 int reg_num; in dump_peri_ao2_apc() local
2555 for (i = 0; i <= reg_num; i++) { in dump_peri_ao2_apc()
[all …]
/tf-a-ffa_el3_spmc/drivers/marvell/
A Dmci.c64 #define MCI_INDIRECT_REG_CTRL_ADDR(reg_num) \ argument
65 (reg_num << MCI_INDIRECT_CTRL_REG_CHIPID_OFFSET)

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