| /tf-a-ffa_el3_spmc/drivers/brcm/emmc/ |
| A D | emmc_csl_sdcmd.c | 39 struct sd_resp resp; in sd_cmd1() local
60 struct sd_resp resp; in sd_cmd2() local
73 struct sd_resp resp; in sd_cmd3() local
96 struct sd_resp resp; in sd_cmd7() local
114 &resp); in sd_cmd7()
130 struct sd_resp resp; in mmc_cmd8() local
155 struct sd_resp resp; in sd_cmd9() local
248 struct sd_resp resp; in sd_cmd13() local
270 struct sd_resp resp; in sd_cmd16() local
356 &resp); in sd_cmd17()
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| A D | emmc_csl_sdcard.c | 861 resp->r1 = 0x3f; in process_cmd_response()
862 resp->cardStatus = cardStatus; in process_cmd_response()
865 resp->data.r4.cardReady = cBit; in process_cmd_response()
866 resp->data.r4.funcs = funcs; in process_cmd_response()
868 resp->data.r4.ocr = cardStatus; in process_cmd_response()
872 resp->data.r6.rca = rca; in process_cmd_response()
877 resp->data.r7.rca = rca; in process_cmd_response()
901 resp->data.r2.rsp4 = rsp3; in process_cmd_response()
902 resp->data.r2.rsp3 = rsp2; in process_cmd_response()
903 resp->data.r2.rsp2 = rsp1; in process_cmd_response()
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| A D | emmc_chal_sd.c | 865 int32_t chal_sd_get_response(CHAL_HANDLE *sd_handle, uint32_t *resp) in chal_sd_get_response() argument
873 resp[0] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
875 resp[1] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
877 resp[2] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
879 resp[3] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
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| A D | emmc_pboot_hal_memory_drv.c | 250 uint32_t options, struct sd_resp *resp) in send_sdio_cmd() argument
259 return send_cmd(sd_handle, cmdIndex, argument, options, resp); in send_sdio_cmd()
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| /tf-a-ffa_el3_spmc/plat/ti/k3/common/drivers/ti_sci/ |
| A D | ti_sci.c | 220 &resp, sizeof(resp), in ti_sci_device_set_state()
265 &resp, sizeof(resp), in ti_sci_device_get_state()
589 &resp, sizeof(resp), in ti_sci_device_set_resets()
644 &resp, sizeof(resp), in ti_sci_clock_set_state()
691 &resp, sizeof(resp), in ti_sci_clock_get_state()
893 &resp, sizeof(resp), in ti_sci_clock_set_parent()
934 &resp, sizeof(resp), in ti_sci_clock_get_parent()
977 &resp, sizeof(resp), in ti_sci_clock_get_num_parents()
1029 &resp, sizeof(resp), in ti_sci_clock_get_match_freq()
1082 &resp, sizeof(resp), in ti_sci_clock_set_freq()
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| /tf-a-ffa_el3_spmc/plat/brcm/board/stingray/src/ |
| A D | scp_cmd.c | 23 static void scp_read_response(crmu_response_t *resp) in scp_read_response() argument
28 resp->completed = code & MCU_IPC_CMD_DONE_MASK; in scp_read_response()
29 resp->cmd = code & SCP_CMD_MASK; in scp_read_response()
30 resp->ret = (code & MCU_IPC_CMD_REPLY_MASK) >> MCU_IPC_CMD_REPLY_SHIFT; in scp_read_response()
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| /tf-a-ffa_el3_spmc/services/std_svc/spm/spmc/ |
| A D | spmc_pm.c | 112 u_register_t resp; in spmc_cpu_off_handler() local
149 resp = read_ctx_reg(get_gpregs_ctx(&ec->cpu_ctx), CTX_GPREG_X0); in spmc_cpu_off_handler()
150 if (resp != FFA_MSG_SEND_DIRECT_RESP_SMC32) { in spmc_cpu_off_handler()
151 ERROR("%s invalid SPMC response (%lx).\n", __func__, resp); in spmc_cpu_off_handler()
156 resp = read_ctx_reg(get_gpregs_ctx(&ec->cpu_ctx), CTX_GPREG_X2); in spmc_cpu_off_handler()
157 if (!(resp & FFA_DIRECT_FRAMEWORK_MSG_MASK) || in spmc_cpu_off_handler()
158 ((resp & FFA_PM_MSG_MASK) != FFA_PM_MSG_PM_RESP)) { in spmc_cpu_off_handler()
159 ERROR("%s invalid SPMC response (%lx).\n", __func__, resp); in spmc_cpu_off_handler()
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| A D | spmc_shared_mem.c | 475 struct ffa_mtd *resp = mbox->rx_buffer; in spmc_ffa_mem_retrieve_req() local
591 memcpy(resp, &obj->desc, copy_size); in spmc_ffa_mem_retrieve_req()
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| /tf-a-ffa_el3_spmc/drivers/ufs/ |
| A D | ufs.c | 419 resp_upiu_t *resp; in ufs_check_resp() local
438 (void)resp; in ufs_check_resp()
507 query_resp_upiu_t *resp; in ufs_query() local
597 resp_upiu_t *resp; in ufs_read_capacity() local
627 sense = &resp->sd.sense; in ufs_read_capacity()
648 resp_upiu_t *resp; in ufs_read_blocks() local
664 resp = (resp_upiu_t *)utrd.resp_upiu; in ufs_read_blocks()
666 return size - resp->res_trans_cnt; in ufs_read_blocks()
672 resp_upiu_t *resp; in ufs_write_blocks() local
688 resp = (resp_upiu_t *)utrd.resp_upiu; in ufs_write_blocks()
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| /tf-a-ffa_el3_spmc/drivers/nxp/sd/ |
| A D | sd_mmc.c | 1002 uint32_t resp[4]; in identify_mmc_card() local
1011 ret = esdhc_wait_response(mmc, resp); in identify_mmc_card()
1027 ret = esdhc_wait_response(mmc, resp); in identify_mmc_card()
1031 } while (((resp[0] & MMC_OCR_BUSY) == 0U) && in identify_mmc_card()
1038 if ((resp[0] & MMC_OCR_CCS) == MMC_OCR_CCS) { in identify_mmc_card()
1061 uint32_t resp[4]; in check_for_sd_card() local
1068 ret = esdhc_wait_response(mmc, resp); in check_for_sd_card()
1079 ret = esdhc_wait_response(mmc, resp); in check_for_sd_card()
1097 ret = esdhc_wait_response(mmc, resp); in check_for_sd_card()
1113 ret = esdhc_wait_response(mmc, resp); in check_for_sd_card()
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| /tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| A D | ari.c | 253 uint64_t resp; in ari_enumeration_misc() local
267 resp = (uint64_t)ret; in ari_enumeration_misc()
270 resp = ari_get_response_low(ari_base); in ari_enumeration_misc()
271 resp |= ((uint64_t)ari_get_response_high(ari_base) << 32); in ari_enumeration_misc()
274 return resp; in ari_enumeration_misc()
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| /tf-a-ffa_el3_spmc/plat/intel/soc/common/ |
| A D | socfpga_sip_svc.c | 134 uint32_t resp[5]; in intel_fpga_config_completed_write() local
140 resp, ARRAY_SIZE(resp)); in intel_fpga_config_completed_write()
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| /tf-a-ffa_el3_spmc/include/drivers/brcm/emmc/ |
| A D | emmc_csl_sd.h | 86 uint32_t rsp3, struct sd_resp *resp);
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| A D | emmc_csl_sdcmd.h | 167 uint32_t argument, uint32_t options, struct sd_resp *resp);
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| A D | emmc_chal_sd.h | 191 int32_t chal_sd_get_response(CHAL_HANDLE *sdHandle, uint32_t *resp);
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| /tf-a-ffa_el3_spmc/ |
| A D | PROTOTYPE_README | 165 1) Echo a message to the Physical SP and Back using direct req/resp
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| /tf-a-ffa_el3_spmc/docs/components/ |
| A D | xlat-tables-lib-v2-design.rst | 319 is a request to map (resp. unmap) a memory region, it is added to (resp. removed
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| A D | secure-partition-manager.rst | 138 - **CTX_INCLUDE_EL2_REGS**: this option permits saving (resp.
139 restoring) the EL2 system register context before entering (resp.
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