Searched refs:routing (Results 1 – 9 of 9) sorted by relevance
| /tf-a-ffa_el3_spmc/docs/design/ |
| A D | interrupt-framework-design.rst | 5 allows EL3 software to configure the interrupt routing behavior. Its main
78 Valid routing models
99 secure state. This is a valid routing model as secure software is in
103 state. This is a valid routing model as secure software in EL3 can
193 borne in mind when choosing the routing model for an interrupt type.
200 effectively routing the other interrupt type also to EL3.
221 specification of the routing model for a type of interrupt.
404 the routing model. It could determine the routing model at build time or at
426 routing model at build time.
510 will be routed to EL3 (as per the routing model where **CSS=1 and
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| /tf-a-ffa_el3_spmc/services/std_svc/sdei/ |
| A D | sdei_main.c | 280 unsigned int routing; in sdei_event_routing_set() local
312 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_routing_set()
326 plat_ic_set_spi_routing(map->intr, routing, (u_register_t) mpidr); in sdei_event_routing_set()
342 unsigned int routing; in sdei_event_register() local
430 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_register()
432 plat_ic_set_spi_routing(map->intr, routing, in sdei_event_register()
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| /tf-a-ffa_el3_spmc/docs/components/ |
| A D | platform-interrupt-controller-API.rst | 224 This API should set the routing mode of Share Peripheral Interrupt (SPI)
238 the routing.
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| A D | ras.rst | 23 As mentioned above, the RAS support in |TF-A| enables routing to and handling of
201 - ``HANDLE_EA_EL3_FIRST=1`` enables routing of External Aborts and SErrors to
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| A D | exception-handling.rst | 26 interrupt routing model, TF-A appropriately sets the ``FIQ`` and ``IRQ`` bits of
27 ``SCR_EL3`` register to effect this routing. For most use cases, other than for
150 interrupts at S-EL1. Essentially, this deprecates the routing mode described
537 interrupts. This also results in setting the routing bits in ``SCR_EL3``.
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| /tf-a-ffa_el3_spmc/docs/about/ |
| A D | features.rst | 41 and interrupt routing.
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| /tf-a-ffa_el3_spmc/docs/getting_started/ |
| A D | build-options.rst | 657 routing model which routes non-secure interrupts asynchronously from TSP
659 for saving and restoring the TSP context in this routing model. The
660 default routing model (when the value is 0) is to route non-secure
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| A D | psci-lib-integration-guide.rst | 42 additional configuration to be set for non-secure context, like routing
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| /tf-a-ffa_el3_spmc/docs/ |
| A D | change-log.rst | 1370 - arm/n1sdp: Setup multichip gic routing table, update platform macros
3725 - Enabled wake-up from CPU_SUSPEND to stand-by by temporarily re-routing
3917 - Support has been added to demonstrate routing of IRQs to EL3 instead of
4318 (using GICv2 routing only). Demonstrated this working by adding an interrupt
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