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/tf-a-ffa_el3_spmc/plat/st/common/include/
A Dstm32mp_shres_helpers.h27 static inline int stm32mp_incr_shrefcnt(unsigned int *refcnt, bool secure) in stm32mp_incr_shrefcnt() argument
31 if (secure) { in stm32mp_incr_shrefcnt()
44 static inline int stm32mp_decr_shrefcnt(unsigned int *refcnt, bool secure) in stm32mp_decr_shrefcnt() argument
48 if (secure) { in stm32mp_decr_shrefcnt()
/tf-a-ffa_el3_spmc/tools/marvell/doimage/secure/
A Dsec_img_7K.cfg3 kak_key_file = "tools/doimage/secure/kak_priv_pem.key";
8 csk_key_file = ["tools/doimage/secure/csk_priv_pem0.key",
9 "tools/doimage/secure/csk_priv_pem1.key",
10 "tools/doimage/secure/csk_priv_pem2.key",
11 "tools/doimage/secure/csk_priv_pem3.key",
18 aes_key_file = "tools/doimage/secure/aes_key.txt";
A Dsec_img_8K.cfg3 kak_key_file = "tools/doimage/secure/kak_priv_pem.key";
8 csk_key_file = ["tools/doimage/secure/csk_priv_pem0.key",
9 "tools/doimage/secure/csk_priv_pem1.key",
10 "tools/doimage/secure/csk_priv_pem2.key",
11 "tools/doimage/secure/csk_priv_pem3.key",
18 aes_key_file = "tools/doimage/secure/aes_key.txt";
/tf-a-ffa_el3_spmc/docs/design/
A Dinterrupt-framework-design.rst13 that secure interrupts are under the control of the secure software with
18 non-secure software (Non-secure interrupts) to the last executed exception
99 secure state. This is a valid routing model as secure software is in
107 non-secure state. This is an invalid routing model as a secure interrupt
115 Non-secure interrupts
119 secure state. This allows the secure software to trap non-secure
121 non-secure software through EL3. This is a valid routing model as secure
713 require a context switch from secure to non-secure or vice-versa:
820 Test secure payload dispatcher non-secure interrupt handling
850 routing model for non-secure interrupt in secure state is in effect
[all …]
/tf-a-ffa_el3_spmc/docs/components/
A Dfirmware-update.rst40 - Copying images from non-secure to secure memory
48 interfaces to non-secure memory.
84 authenticated/executed in secure or non-secure memory.
102 complex state machine than non-secure images.
114 in blocks from non-secure to secure memory.
117 copying it to secure memory.
221 This SMC copies the secure image indicated by ``image_id`` from non-secure memory
260 if (secure world caller)
264 if (image_id is secure image)
304 secure world image.
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A Dindex.rst20 secure-partition-manager
21 secure-partition-manager-mm
A Dsecure-partition-manager.rst280 Loading Hafnium and secure partitions in the secure world
335 Describing secure partitions
453 Hafnium in the secure world
665 The FF-A id space is split into a non-secure space and secure space:
731 With secure virtualization enabled, two IPA spaces are output from the secure
732 EL1&0 Stage-1 translation (secure and non-secure). The EL1&0 Stage-2 translation
736 - Two IPA spaces (secure and non-secure) when the SP EL1&0 Stage-1 MMU is
850 - SMMUv3 offers non-secure stream support with secure stream support being
852 instance for secure and non-secure stream support.
871 registers have independent secure and non-secure versions to configure the
[all …]
/tf-a-ffa_el3_spmc/docs/security_advisories/
A Dsecurity-advisory-tfv-2.rst5 | Title | Enabled secure self-hosted invasive debug interface can |
6 | | allow normal world to panic secure world |
18 | Impact | Denial of Service (secure world panic) |
25 The ``MDCR_EL3.SDD`` bit controls AArch64 secure self-hosted invasive debug
28 entrypoint code, which enables debug exceptions from the secure world. This can
32 normal world attacker to induce a panic in the secure world.
35 from the secure world.
42 secure self-hosted invasive debug enablement. TF assigns these bits to ``00``
45 secure privileged invasive debug is enabled by the authentication interface, at
A Dsecurity-advisory-tfv-5.rst6 | | secure world timing information |
18 | Impact | Leakage of sensitive secure world timing information |
32 bit is set to zero, the cycle counter (when enabled) counts during secure world
36 normal and secure worlds, normal world code can set ``PMCR_EL0.DP`` to zero to
37 cause leakage of secure world timing information. This register should be added
45 sensible default values in the secure context.
/tf-a-ffa_el3_spmc/services/spd/trusty/
A Dgeneric-arm64-smcall.c40 static void trusty_dputc(char ch, int secure) in trusty_dputc() argument
43 struct dputc_state *s = &dputc_state[!secure]; in trusty_dputc()
50 if (secure) in trusty_dputc()
/tf-a-ffa_el3_spmc/plat/rockchip/rk3288/
A Dplatform.mk24 -I${RK_PLAT_SOC}/drivers/secure/ \
56 ${RK_PLAT_SOC}/drivers/secure/secure.c \
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dpsci-lib-integration-guide.rst9 at the highest secure privileged mode, which is EL3 in AArch64 or Secure SVC/
39 #. Get the non-secure ``cpu_context_t`` for the current CPU by calling
56 initializes/restores the non-secure CPU context as well.
111 values safely until it is ready for exit to non-secure world.
154 PSCI library needs the flexibility to access both secure and non-secure
223 to the non-secure world.
259 secure or non-secure world. The ``cookie`` (6th argument) and the ``handle``
288 - Restores/Initializes the non-secure context and populates the
293 prior to exit to the non-secure world.
509 in `PSCI spec`_. If the secure payload is a Uniprocessor (UP)
[all …]
/tf-a-ffa_el3_spmc/docs/process/
A Dsecurity.rst20 Although we try to keep TF-A secure, we can only do so with the help of the
49 | | large data into secure memory |
51 | |TFV-2| | Enabled secure self-hosted invasive debug interface can allow |
52 | | normal world to panic secure world |
57 | | authentication of unexpected data in secure memory in AArch32 |
60 | |TFV-5| | Not initializing or saving/restoring PMCR_EL0 can leak secure |
/tf-a-ffa_el3_spmc/plat/rockchip/px30/
A Dplatform.mk24 -I${RK_PLAT_SOC}/drivers/secure/ \
58 ${RK_PLAT_SOC}/drivers/secure/secure.c \
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dstm32mp1_shared_resources.c359 unsigned int secure = 0U; in stm32mp_gpio_bank_is_secure() local
370 secure++; in stm32mp_gpio_bank_is_secure()
374 return secure == get_gpioz_nbpin(); in stm32mp_gpio_bank_is_secure()
536 bool secure = stm32mp1_rcc_is_secure(); in check_rcc_secure_configuration() local
543 if (!secure || (mckprot_protects_periph(n) && (!mckprot))) { in check_rcc_secure_configuration()
545 secure ? "secure" : "non-secure", in check_rcc_secure_configuration()
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/
A Dplatform.mk20 -I${RK_PLAT_SOC}/drivers/secure/ \
67 ${RK_PLAT_SOC}/drivers/secure/secure.c \
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a70x0/
A Dplatform.mk13 DOIMAGE_SEC := tools/doimage/secure/sec_img_7K.cfg
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a70x0_amc/
A Dplatform.mk13 DOIMAGE_SEC := tools/doimage/secure/sec_img_7K.cfg
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0/
A Dplatform.mk13 DOIMAGE_SEC := tools/doimage/secure/sec_img_8K.cfg
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0_mcbin/
A Dplatform.mk13 DOIMAGE_SEC := tools/doimage/secure/sec_img_8K.cfg
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0_puzzle/
A Dplatform.mk13 DOIMAGE_SEC := tools/doimage/secure/sec_img_8K.cfg
/tf-a-ffa_el3_spmc/plat/marvell/octeontx/otx2/t91/t9130/
A Dplatform.mk13 DOIMAGE_SEC := tools/doimage/secure/sec_img_7K.cfg
/tf-a-ffa_el3_spmc/docs/components/measured_boot/
A Devent_log.rst24 - Event Log base address in secure memory.
31 - Event Log base address in non-secure memory.
/tf-a-ffa_el3_spmc/plat/arm/board/tc/fdts/
A Dtc_tb_fw_config.dts28 secure-partitions {
31 secure-storage {
/tf-a-ffa_el3_spmc/docs/plat/
A Drpi4.rst8 This port is a minimal port to support loading non-secure EL2 payloads such
12 **IMPORTANT NOTE**: This port isn't secure. All of the memory used is DRAM,
13 which is available from both the Non-secure and Secure worlds. The SoC does
14 not seem to feature a secure memory controller of any kind, so portions of
15 DRAM can't be protected properly from the Non-secure world.
44 non-secure payload to not touch the resident TF-A code.

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