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/tf-a-ffa_el3_spmc/plat/nxp/common/setup/
A Dcommon.mk50 PLAT_SETUP_PATH := ${PLAT_PATH}/common/setup
65 plat/nxp/common/setup/ls_err.c \
66 plat/nxp/common/setup/ls_common.c
80 plat/nxp/common/setup/ls_image_load.c \
81 plat/nxp/common/setup/ls_io_storage.c \
82 plat/nxp/common/setup/ls_bl2_el3_setup.c \
83 plat/nxp/common/setup/${ARCH}/ls_bl2_mem_params_desc.c
85 BL31_SOURCES += plat/nxp/common/setup/ls_bl31_setup.c \
89 BL31_SOURCES += plat/nxp/common/setup/ls_interrupt_mgmt.c
/tf-a-ffa_el3_spmc/plat/brcm/board/common/
A Dbcm_elog_ddr.c21 struct elog_setup setup = {0}; in elog_init_ddr_log() local
115 setup.params[0] = TMP_ELOG_METADATA_BASE; in elog_init_ddr_log()
116 setup.params[1] = (sizeof(global) + global.rec_count * sizeof(rec)); in elog_init_ddr_log()
117 setup.cmd = ELOG_SETUP_CMD_WRITE_META; in elog_init_ddr_log()
119 flush_dcache_range((uintptr_t)&setup, sizeof(struct elog_setup)); in elog_init_ddr_log()
120 flush_dcache_range((uintptr_t)setup.params[0], setup.params[1]); in elog_init_ddr_log()
125 (uint32_t)(uintptr_t)(&setup), in elog_init_ddr_log()
/tf-a-ffa_el3_spmc/docs/resources/diagrams/plantuml/
A Dfconf_bl2_populate.puml20 == bl2 setup ==
A Dfconf_bl1_load_config.puml23 note over arm_io_storage : register and setup fip
/tf-a-ffa_el3_spmc/docs/plat/arm/arm_fpga/
A Dindex.rst8 Some interconnect setup is done internally by the platform, so the TF-A code
9 just needs to setup UART and GIC.
71 addresses need to differ for a certain setup, they can be passed on the
/tf-a-ffa_el3_spmc/fdts/
A Dn1sdp-single-chip.dts22 /* This configuration assumes that standard setup with two DIMM modules.
/tf-a-ffa_el3_spmc/include/drivers/
A Draw_nand.h163 void (*setup)(struct nand_device *nand); member
/tf-a-ffa_el3_spmc/drivers/mtd/nand/
A Draw_nand.c421 if ((rawnand_dev.ops->setup == NULL) || in nand_raw_init()
443 rawnand_dev.ops->setup(rawnand_dev.nand_dev); in nand_raw_init()
/tf-a-ffa_el3_spmc/docs/plat/
A Dintel-agilex.rst75 INFO: BL2: Doing platform setup
A Dintel-stratix10.rst76 INFO: BL2: Doing platform setup
A Dallwinner.rst5 SoCs with ARMv8 cores. Only BL31 is used to provide proper EL3 setup and
A Dsocionext-uniphier.rst42 setup, it decompresses the appended BL2 image into the DRAM, then jumps to
A Drz-g2.rst197 INFO: BL2: Doing platform setup
A Drcar-gen3.rst222 INFO: BL2: Doing platform setup
/tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/
A Dsoc.mk170 include ${PLAT_PATH}/common/setup/common.mk
/tf-a-ffa_el3_spmc/
A DPROTOTYPE_README193 INFO: Secure Partition context setup start.
194 INFO: Secure Partition setup done.
/tf-a-ffa_el3_spmc/docs/components/
A Ddebugfs-design.rst97 - In order to setup the shared buffer, the component consuming the interface
A Darm-sip-service.rst376 Initial call to setup the shared exchange buffer. Notice if successful once,
A Dsecure-partition-manager-mm.rst88 - Perform architectural and system setup required by the Secure Partition to
403 architectural setup to enable execution in S-EL0
405 MMU setup
434 System registers that influence software execution in S-EL0 are setup by the SPM
A Dras.rst147 work, the platform must setup and register with |EHF|. See `Interaction with
/tf-a-ffa_el3_spmc/docs/getting_started/
A Dpsci-lib-integration-guide.rst29 setup.
162 - The page tables must be setup and the MMU enabled
163 - The C runtime environment must be setup and stack initialized
198 runtime. Prior to calling the ``psci_setup()`` interface, the platform setup for
A Dporting-guide.rst51 provided to help in this setup.
63 platform-specific architecture setup function, ``blX_plat_arch_setup()``, and uses
1271 This function performs any platform-specific and architectural setup that the
1272 platform requires. Platform-specific setup might include configuration of
1288 for performing any remaining platform-specific setup that can occur after the
1526 In Arm standard platforms, this function performs security setup, including
1665 #. Any platform specific setup required to perform the FWU process. For
1721 In Arm standard platforms, this function performs security setup, including
1880 setup just prior to BL31 exit during cold boot. The default weak
1945 This function is used by the architecture setup code to retrieve the counter
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/tf-a-ffa_el3_spmc/docs/plat/arm/
A Darm-build-options.rst23 platform setup hook at BL1 and disabled in the BL1 prepare exit hook. The
/tf-a-ffa_el3_spmc/docs/
A Dchange-log.rst357 - Leave CPU power alone during BL31 setup
365 - Added R_PRCM security setup for H6 board
366 - Added SPC security setup for H6 board
374 - Do not setup 'disabled' regulator
802 - Added support for performing SDEI platform setup at runtime
1424 setup scheme as RPi4
1521 of io setup failure
1600 - rpi3: gpio: Simplify GPIO setup
4068 to physical address mappings in the MMU setup.
4151 - Reworked the TSPD setup code to support the alternate BL3-2
[all …]
/tf-a-ffa_el3_spmc/drivers/st/fmc/
A Dstm32_fmc2_nand.c783 .setup = stm32_fmc2_setup,

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