| /tf-a-ffa_el3_spmc/drivers/nxp/console/ |
| A D | console_16550.c | 22 struct sysinfo sys; in plat_console_init() local
25 zeromem(&sys, sizeof(sys)); in plat_console_init()
26 if (get_clocks(&sys)) { in plat_console_init()
31 (sys.freq_platform/uart_clk_div), in plat_console_init()
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| A D | console_pl011.c | 23 struct sysinfo sys; in plat_console_init() local
26 zeromem(&sys, sizeof(sys)); in plat_console_init()
27 if (get_clocks(&sys)) { in plat_console_init()
33 (sys.freq_platform/uart_clk_div), in plat_console_init()
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| /tf-a-ffa_el3_spmc/drivers/nxp/dcfg/ |
| A D | dcfg.c | 90 int get_clocks(struct sysinfo *sys) in get_clocks() argument
97 sys->freq_platform = sysclk; in get_clocks()
98 sys->freq_ddr_pll0 = ddrclk; in get_clocks()
99 sys->freq_ddr_pll1 = ddrclk; in get_clocks()
101 sys->freq_platform *= (gur_in32(rcwsr0) >> in get_clocks()
105 sys->freq_platform /= dcfg_init_info->nxp_plat_clk_divider; in get_clocks()
107 sys->freq_ddr_pll0 *= (gur_in32(rcwsr0) >> in get_clocks()
110 sys->freq_ddr_pll1 *= (gur_in32(rcwsr0) >> in get_clocks()
113 if (sys->freq_platform == 0) { in get_clocks()
|
| /tf-a-ffa_el3_spmc/tools/memory/ |
| A D | print_memory_map.py | 10 import sys
36 if len(sys.argv) >= 2:
37 build_dir = sys.argv[1]
38 if len(sys.argv) >= 3:
39 inverted_print = sys.argv[2] == '0'
|
| /tf-a-ffa_el3_spmc/tools/sptool/ |
| A D | sp_mk_generator.py | 52 import sys
55 with open(sys.argv[2],'r') as in_file:
57 json_file = os.path.abspath(sys.argv[2])
59 gen_file = os.path.abspath(sys.argv[1])
60 out_dir = os.path.abspath(sys.argv[3])
63 dualroot = sys.argv[4].lower() == "dualroot"
|
| /tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2160ardb/ |
| A D | ddr_init.c | 169 struct sysinfo sys; in init_ddr() local
172 zeromem(&sys, sizeof(sys)); in init_ddr()
173 if (get_clocks(&sys) != 0) { in init_ddr()
177 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
178 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
179 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
190 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
194 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
|
| /tf-a-ffa_el3_spmc/lib/romlib/ |
| A D | romlib_generator.py | 16 import sys
263 if len(sys.argv) < 2 or sys.argv[1] not in APPS:
264 print("usage: romlib_generator.py [%s] [args]" % "|".join(APPS.keys()), file=sys.stderr)
265 sys.exit(1)
267 APP = APPS[sys.argv[1]]("romlib_generator.py " + sys.argv[1])
268 APP.parse_arguments(sys.argv[2:])
271 sys.exit(0)
273 print(file_not_found_error, file=sys.stderr)
275 print(called_process_error.output, file=sys.stderr)
277 sys.exit(1)
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| /tf-a-ffa_el3_spmc/drivers/nxp/ddr/nxp-ddr/ |
| A D | utility.c | 40 unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num) in get_ddr_freq() argument
42 if (sys->freq_ddr_pll0 == 0) { in get_ddr_freq()
43 get_clocks(sys); in get_ddr_freq()
48 return sys->freq_ddr_pll0; in get_ddr_freq()
50 return sys->freq_ddr_pll0; in get_ddr_freq()
52 return sys->freq_ddr_pll1; in get_ddr_freq()
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| /tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2160aqds/ |
| A D | ddr_init.c | 304 struct sysinfo sys; in init_ddr() local
307 zeromem(&sys, sizeof(sys)); in init_ddr()
308 if (get_clocks(&sys) == 1) { in init_ddr()
312 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
313 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
314 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
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| /tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2162aqds/ |
| A D | ddr_init.c | 304 struct sysinfo sys; in init_ddr() local
307 zeromem(&sys, sizeof(sys)); in init_ddr()
308 if (get_clocks(&sys) != 0) { in init_ddr()
312 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
313 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
314 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
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| /tf-a-ffa_el3_spmc/include/drivers/nxp/ddr/ |
| A D | utility.h | 18 unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num);
|
| /tf-a-ffa_el3_spmc/include/drivers/nxp/dcfg/ |
| A D | dcfg.h | 84 int get_clocks(struct sysinfo *sys);
|
| /tf-a-ffa_el3_spmc/docs/plat/arm/juno/ |
| A D | index.rst | 228 echo +10 > /sys/class/rtc/rtc0/wakealarm
229 echo -n mem > /sys/power/state
|
| /tf-a-ffa_el3_spmc/docs/plat/marvell/armada/ |
| A D | build.rst | 248 binary and sys-init code from the WTP directory which sets DDR and CPU
319 binary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for
|
| /tf-a-ffa_el3_spmc/docs/ |
| A D | change-log.rst | 66 - Delay timer and sys timer
|