| /tf-a-ffa_el3_spmc/plat/socionext/synquacer/ |
| A D | sq_xlat_setup.c | 15 void sq_mmap_setup(uintptr_t total_base, size_t total_size, in sq_mmap_setup() argument
19 (void *)total_base, (void *)(total_base + total_size)); in sq_mmap_setup()
20 mmap_add_region(total_base, total_base, in sq_mmap_setup()
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| /tf-a-ffa_el3_spmc/plat/marvell/armada/common/aarch64/ |
| A D | marvell_common.c | 33 void marvell_setup_page_tables(uintptr_t total_base, in marvell_setup_page_tables() argument
51 (void *) total_base, (void *) (total_base + total_size)); in marvell_setup_page_tables()
52 mmap_add_region(total_base, total_base, in marvell_setup_page_tables()
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| /tf-a-ffa_el3_spmc/plat/qemu/common/ |
| A D | qemu_private.h | 12 void qemu_configure_mmu_svc_mon(unsigned long total_base,
18 void qemu_configure_mmu_el1(unsigned long total_base, unsigned long total_size,
23 void qemu_configure_mmu_el3(unsigned long total_base, unsigned long total_size,
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| A D | qemu_bl1_setup.c | 35 bl1_tzram_layout.total_base = BL_RAM_BASE; in bl1_early_platform_setup()
52 QEMU_CONFIGURE_BL1_MMU(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/rockchip/common/aarch32/ |
| A D | platform_common.c | 19 void plat_configure_mmu_svc_mon(unsigned long total_base, in plat_configure_mmu_svc_mon() argument
26 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_svc_mon()
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| /tf-a-ffa_el3_spmc/plat/layerscape/common/ |
| A D | ls_common.c | 70 void ls_setup_page_tables(uintptr_t total_base, in ls_setup_page_tables() argument
90 (void *) total_base, (void *) (total_base + total_size)); in ls_setup_page_tables()
91 mmap_add_region(total_base, total_base, in ls_setup_page_tables()
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| A D | ls_bl1_setup.c | 38 bl1_tzram_layout.total_base = LS_SRAM_BASE; in ls_bl1_early_platform_setup()
50 ls_setup_page_tables(bl1_tzram_layout.total_base, in ls_bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8195/aarch64/ |
| A D | platform_common.c | 31 void plat_configure_mmu_el3(uintptr_t total_base, in plat_configure_mmu_el3() argument
36 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
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| /tf-a-ffa_el3_spmc/plat/rockchip/common/aarch64/ |
| A D | platform_common.c | 32 void plat_configure_mmu_el ## _el(unsigned long total_base, \
39 mmap_add_region(total_base, total_base, \
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| /tf-a-ffa_el3_spmc/plat/hisilicon/poplar/include/ |
| A D | plat_private.h | 14 void plat_configure_mmu_el3(unsigned long total_base,
21 void plat_configure_mmu_el1(unsigned long total_base,
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8192/aarch64/ |
| A D | platform_common.c | 39 void plat_configure_mmu_el3(uintptr_t total_base, in plat_configure_mmu_el3() argument
44 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/poplar/aarch64/ |
| A D | platform_common.c | 51 void plat_configure_mmu_el##_el(unsigned long total_base, \
58 mmap_add_region(total_base, total_base, \
|
| /tf-a-ffa_el3_spmc/plat/mediatek/mt8173/aarch64/ |
| A D | platform_common.c | 41 void plat_configure_mmu_el ## _el(unsigned long total_base, \
48 mmap_add_region(total_base, total_base, \
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| /tf-a-ffa_el3_spmc/plat/qti/common/src/ |
| A D | qti_common.c | 80 void qti_setup_page_tables(uintptr_t total_base, in qti_setup_page_tables() argument
93 (void *)total_base, (void *)(total_base + total_size)); in qti_setup_page_tables()
94 mmap_add_region(total_base, total_base, in qti_setup_page_tables()
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| /tf-a-ffa_el3_spmc/plat/mediatek/mt8183/aarch64/ |
| A D | platform_common.c | 38 void plat_configure_mmu_el3(uintptr_t total_base, in plat_configure_mmu_el3() argument
45 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/ |
| A D | hikey960_private.h | 15 void hikey960_init_mmu_el1(unsigned long total_base,
21 void hikey960_init_mmu_el3(unsigned long total_base,
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| /tf-a-ffa_el3_spmc/plat/hisilicon/poplar/ |
| A D | bl1_plat_setup.c | 56 bl2_tzram_layout.total_base = BL2_BASE; in bl1_plat_handle_post_image_load()
76 bl1_tzram_layout.total_base = BL1_RW_BASE; in bl1_early_platform_setup()
85 plat_configure_mmu_el3(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/rpi/common/ |
| A D | rpi3_common.c | 151 void rpi3_setup_page_tables(uintptr_t total_base, size_t total_size, in rpi3_setup_page_tables() argument
164 (void *) total_base, (void *) (total_base + total_size)); in rpi3_setup_page_tables()
165 mmap_add_region(total_base, total_base, in rpi3_setup_page_tables()
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey/aarch64/ |
| A D | hikey_common.c | 94 void hikey_init_mmu_el##_el(unsigned long total_base, \
101 mmap_add_region(total_base, total_base, \
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| /tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/aarch64/ |
| A D | hikey960_common.c | 90 void hikey960_init_mmu_el##_el(unsigned long total_base, \
97 mmap_add_region(total_base, total_base, \
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| /tf-a-ffa_el3_spmc/plat/intel/soc/common/include/ |
| A D | socfpga_private.h | 39 void socfgpa_configure_mmu_el3(unsigned long total_base,
47 void socfpga_configure_mmu_el1(unsigned long total_base,
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| /tf-a-ffa_el3_spmc/plat/marvell/armada/common/ |
| A D | marvell_bl1_setup.c | 42 bl1_ram_layout.total_base = MARVELL_BL_RAM_BASE; in marvell_bl1_early_platform_setup()
59 marvell_setup_page_tables(bl1_ram_layout.total_base, in marvell_bl1_plat_arch_setup()
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| /tf-a-ffa_el3_spmc/plat/arm/common/ |
| A D | arm_bl2_el3_setup.c | 19 bl2_el3_tzram_layout.total_base, \
39 bl2_el3_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl2_el3_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/renesas/common/aarch64/ |
| A D | platform_common.c | 147 void rcar_configure_mmu_el3(unsigned long total_base, in rcar_configure_mmu_el3() argument
154 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
166 void rcar_configure_mmu_el3(unsigned long total_base, in rcar_configure_mmu_el3() argument
171 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
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| /tf-a-ffa_el3_spmc/plat/rpi/rpi3/ |
| A D | rpi3_bl1_setup.c | 41 bl1_tzram_layout.total_base = BL_RAM_BASE; in bl1_early_platform_setup()
52 rpi3_setup_page_tables(bl1_tzram_layout.total_base, in bl1_plat_arch_setup()
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