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/tf-a-ffa_el3_spmc/plat/marvell/octeontx/otx2/t91/t9130/board/
A Dphy-porting-layer.h32 .valid = 1 }, /* Comphy2 */
43 .valid = 1 }, /* Comphy4 */
60 .valid = 1 }, /* Comphy2 */
72 .valid = 1}, /* Comphy4 */
89 .valid = 1 }, /* Comphy2 */
100 .valid = 1 }, /* Comphy4 */
135 .valid = 0x1
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0/board/
A Dphy-porting-layer.h28 .valid = 0x1 }, /* Comphy2 */
37 .valid = 0x1 }, /* Comphy4 */
52 .valid = 0x1 }, /* Comphy2 */
61 .valid = 0x1 }, /* Comphy4 */
96 .valid = 0x1
121 .valid = 0x1
152 .valid = 0x1
177 .valid = 0x1
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spm/constraints/
A Dmt_spm_rc_dram.c68 .valid = (MT_SPM_RC_VALID_SW |
89 return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid); in spm_is_valid_rc_dram()
107 ((status.valid & in spm_update_rc_dram()
131 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_run_rc_dram()
166 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_reset_rc_dram()
A Dmt_spm_rc_syspll.c67 .valid = (MT_SPM_RC_VALID_SW |
88 return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid); in spm_is_valid_rc_syspll()
107 ((status.valid & in spm_update_rc_syspll()
131 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_run_rc_syspll()
167 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_reset_rc_syspll()
A Dmt_spm_rc_bus26m.c80 .valid = (MT_SPM_RC_VALID_SW |
148 return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid); in spm_is_valid_rc_bus26m()
167 ((status.valid & in spm_update_rc_bus26m()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spm/constraints/
A Dmt_spm_rc_dram.c77 .valid = (MT_SPM_RC_VALID_SW |
98 return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid); in spm_is_valid_rc_dram()
116 ((status.valid & in spm_update_rc_dram()
140 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_run_rc_dram()
176 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_reset_rc_dram()
A Dmt_spm_rc_syspll.c75 .valid = (MT_SPM_RC_VALID_SW |
96 return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid); in spm_is_valid_rc_syspll()
115 ((status.valid & in spm_update_rc_syspll()
139 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_run_rc_syspll()
175 if (IS_MT_SPM_RC_BBLPM_MODE(status.valid)) { in spm_reset_rc_syspll()
A Dmt_spm_rc_bus26m.c90 .valid = (MT_SPM_RC_VALID_SW |
158 return (status.cond_block == 0U) && IS_MT_RM_RC_READY(status.valid); in spm_is_valid_rc_bus26m()
177 ((status.valid & in spm_update_rc_bus26m()
/tf-a-ffa_el3_spmc/drivers/marvell/comphy/
A Dphy-default-porting-layer.h23 .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2, .valid = 1
49 .valid = 0x1
A Dphy-comphy-cp110.h27 _Bool valid; member
81 _Bool valid; member
/tf-a-ffa_el3_spmc/services/std_svc/trng/
A Dtrng_entropy_pool.c48 bool valid = plat_get_entropy(&entropy[ENTROPY_FREE_INDEX]); in trng_fill_entropy() local
50 if (valid) { in trng_fill_entropy()
/tf-a-ffa_el3_spmc/lib/optee/
A Doptee_utils.c55 int valid = 0; in tee_validate_header() local
61 valid = 1; in tee_validate_header()
68 return valid; in tee_validate_header()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_constraint.h50 uint16_t valid; member
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_constraint.h50 uint16_t valid; member
/tf-a-ffa_el3_spmc/drivers/measured_boot/
A Devent_print.c32 bool valid = true; in id_event_print() local
59 valid = false; in id_event_print()
67 assert(valid); in id_event_print()
/tf-a-ffa_el3_spmc/docs/plat/marvell/armada/
A Dporting.rst48 feature is used for boot loader recovery by booting from a valid flash-image
70 Before resetting the board make sure there is a valid image on the next flash
73 -tftp [valid address] flash-image.bin
74 -sf update [valid address] 0x2000000 [size]
/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/src/
A Diommu.c258 uint32_t valid; member
312 if (smr->valid) in arm_smmu_smr_cfg()
453 smmu->smr[idx].valid = 1; in arm_smmu_create_identity_map()
/tf-a-ffa_el3_spmc/docs/design/
A Dinterrupt-framework-design.rst84 which ones are valid or invalid. EL3 interrupts are currently supported only
99 secure state. This is a valid routing model as secure software is in
103 state. This is a valid routing model as secure software in EL3 can
112 non-secure state. This is a valid routing model as secure software in EL3
121 non-secure software through EL3. This is a valid routing model as secure
126 state. This is a valid routing model as secure software in EL3 can save
133 non-secure state. This is a valid routing model as a non-secure interrupt
137 non-secure state. This is an invalid routing model as there is no valid
147 Secure-EL1/Secure-EL0. This is a valid routing model as secure software
157 Secure-EL1/Secure-EL0. This is a valid routing model as secure software
[all …]
A Dpsci-pd-tree.rst163 #. Implement more complex logic to convert a valid MPIDR to a core index while
/tf-a-ffa_el3_spmc/docs/plat/arm/
A Darm-build-options.rst143 valid value greater than 1, the platform code performs required configuration
150 valid values is platform specific.
/tf-a-ffa_el3_spmc/docs/getting_started/
A Drt-svc-writers-guide.rst62 Each individual entity can allocate the valid identifiers within the entity
195 #. Determining that ``smc_fid`` is a valid and supported SMC Function ID,
202 #. Determining if the requested function is valid for the calling security
A Dbuild-options.rst155 certificate generation tool to create new keys in case no valid keys are
330 ``MEASURED_BOOT`` is enabled. For a list of valid values, see ``LOG_LEVEL``.
435 the algorithm specified by ``KEY_ALG``. The valid values for ``KEY_SIZE``
597 This build option is only valid if ``ARCH=aarch64``. The value should be
/tf-a-ffa_el3_spmc/include/drivers/
A Dufs.h273 uint8_t valid : 1; member
/tf-a-ffa_el3_spmc/docs/security_advisories/
A Dsecurity-advisory-tfv-8.rst75 SMCs it would need to be aware of which return registers contain valid data, so
/tf-a-ffa_el3_spmc/docs/components/fconf/
A Dindex.rst103 Once a valid device tree is available, the ``fconf_populate(config)`` function

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