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/tf-a-ffa_el3_spmc/plat/nxp/common/psci/aarch64/
A Dpsci_utils.S45 mov x6, x0
58 mov x0, x6
92 mov x0, x6
100 mov x0, x6
131 mov x0, x6
136 mov x0, x6
155 mov x0, x6
160 mov x0, x6
172 mov x0, x6
545 mov x6, x0
[all …]
/tf-a-ffa_el3_spmc/drivers/renesas/common/console/
A Drcar_console.S37 mov x6, x3
38 cbz x6, register_fail
39 str x0, [x6, #CONSOLE_T_BASE]
44 mov x0, x6
/tf-a-ffa_el3_spmc/common/aarch64/
A Ddebug.S38 mov x6, #10 /* Divide by 10 after every loop iteration */
45 udiv x5, x5, x6 /* Reduce divisor */
66 mov x6, x1
83 tst x6, #~0xffff
85 mov x4, x6
196 mov x6, x30
205 mov x4, x6
219 mov x30, x6
/tf-a-ffa_el3_spmc/plat/imx/common/
A Dlpuart_console.S21 mov x6, x3
22 cbz x6, register_fail
23 str x0, [x6, #CONSOLE_T_BASE]
28 mov x0, x6
A Dimx_uart_console.S26 mov x6, x3
27 cbz x6, register_fail
28 str x0, [x6, #CONSOLE_T_BASE]
33 mov x0, x6
/tf-a-ffa_el3_spmc/bl31/aarch64/
A Dcrash_reporting.S88 ldrb w4, [x6]
91 mov x4, x6
95 sub x0, x4, x6
97 mov x6, x4
221 adr x6, gp_regs
225 ldrb w4, [x6]
228 mov x4, x6
232 sub x0, x4, x6
234 mov x6, x4
369 adr x6, gp_regs
[all …]
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/
A Dplat_sip_calls.c60 uint64_t x5, x6; in rockchip_plat_sip_handler() local
71 x6 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X6); in rockchip_plat_sip_handler()
72 SMC_RET1(handle, dp_hdcp_store_key(x1, x2, x3, x4, x5, x6)); in rockchip_plat_sip_handler()
/tf-a-ffa_el3_spmc/drivers/cadence/uart/aarch64/
A Dcdns_console.S73 mov x6, x3
74 cbz x6, register_fail
75 str x0, [x6, #CONSOLE_T_BASE]
80 mov x0, x6
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/dp/
A Dcdn_dp.c55 uint64_t x6) in dp_hdcp_store_key() argument
66 hdcp_key_pdata[5] = x6; in dp_hdcp_store_key()
/tf-a-ffa_el3_spmc/plat/rockchip/common/include/
A Dplat_macros.S62 adr x6, icc_regs
73 adr x6, gicc_regs
104 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/include/plat/marvell/armada/common/aarch64/
A Dmarvell_macros.S62 adr x6, icc_regs
74 adr x6, gicc_regs
119 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/bl1/aarch64/
A Dbl1_exceptions.S201 ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)]
247 mov x6, sp
256 ldr x12, [x6, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
273 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
274 str x18, [x6, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
/tf-a-ffa_el3_spmc/drivers/arm/pl011/aarch64/
A Dpl011_console.S97 mov x6, x3
98 cbz x6, register_fail
99 str x0, [x6, #CONSOLE_T_BASE]
104 mov x0, x6
/tf-a-ffa_el3_spmc/drivers/ti/uart/aarch64/
A D16550_console.S108 mov x6, x3
109 cbz x6, register_fail
110 str x0, [x6, #CONSOLE_T_BASE]
119 mov x0, x6
/tf-a-ffa_el3_spmc/plat/layerscape/common/aarch64/
A Dls_console.S99 mov x6, x3
100 cbz x6, register_fail
101 str x0, [x6, #CONSOLE_T_BASE]
106 mov x0, x6
/tf-a-ffa_el3_spmc/drivers/amlogic/console/aarch64/
A Dmeson_console.S63 mov x6, x3
64 cbz x6, register_fail
65 str x0, [x6, #CONSOLE_T_BASE]
70 mov x0, x6
/tf-a-ffa_el3_spmc/drivers/marvell/uart/
A Da3700_console.S126 mov x6, x3
127 cbz x6, register_fail
128 str x0, [x6, #CONSOLE_T_BASE]
133 mov x0, x6
/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/include/
A Dplat_macros.S38 adr x6, gicc_regs
67 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/include/
A Dplat_macros.S40 adr x6, gicc_regs
65 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/include/
A Dplat_macros.S40 adr x6, gicc_regs
65 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/plat/renesas/common/include/
A Dplat_macros.S35 adr x6, gicc_regs /* Load the gicc reg list to x6 */
74 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/include/
A Dplat_macros.S32 adr x6, gicc_regs
74 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/plat/mediatek/mt8173/include/
A Dplat_macros.S38 adr x6, gicc_regs
67 adr x6, cci_iface_regs
/tf-a-ffa_el3_spmc/plat/qti/common/src/
A Dqti_syscall.c159 u_register_t x6, x7; in qti_sip_mem_assign() local
185 x6 = *((uint32_t *) x5 + 1); in qti_sip_mem_assign()
189 x6 = *((uint64_t *) x5 + 1); in qti_sip_mem_assign()
207 dyn_map_start = MIN(dyn_map_start, x6); in qti_sip_mem_assign()
209 dyn_map_end = MAX(dyn_map_end, (x6 + x7)); in qti_sip_mem_assign()
223 (memprot_dst_vm_perm_info_t *) x6; in qti_sip_mem_assign()
/tf-a-ffa_el3_spmc/plat/qti/common/inc/aarch64/
A Dplat_macros.S63 adr x6, icc_regs
74 adr x6, gicc_regs

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