Searched refs:ACTLR (Results 1 – 13 of 13) sorted by relevance
| /trusted-firmware-a/lib/cpus/aarch32/ |
| A D | cortex_a12.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
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| A D | cortex_a5.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| A D | cortex_a7.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| A D | cortex_a15.S | 28 ldcopr r0, ACTLR
30 stcopr r0, ACTLR
44 ldcopr r0, ACTLR
46 stcopr r0, ACTLR
135 ldcopr r0, ACTLR
137 stcopr r0, ACTLR
|
| A D | cortex_a9.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| A D | cortex_a17.S | 22 ldcopr r0, ACTLR
24 stcopr r0, ACTLR
31 ldcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| /trusted-firmware-a/docs/security_advisories/ |
| A D | security-advisory-tfv-6.rst | 110 entry into the secure world. For Cortex-A8, also set ``ACTLR[6]`` to 1 during
113 ``ACTLR[0]`` to 1 during early processor initialization, and invalidate the
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| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/security_advisories/ |
| A D | security-advisory-tfv-6.rst.txt | 110 entry into the secure world. For Cortex-A8, also set ``ACTLR[6]`` to 1 during
113 ``ACTLR[0]`` to 1 during early processor initialization, and invalidate the
|
| /trusted-firmware-a/include/arch/aarch32/ |
| A D | arch_helpers.h | 230 DEFINE_COPROCR_RW_FUNCS(actlr, ACTLR) in DEFINE_SYSREG_RW_FUNCS()
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| A D | arch.h | 513 #define ACTLR p15, 0, c1, c0, 1 macro
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| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/ |
| A D | change-log.md.txt | 2578 - SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
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| /trusted-firmware-a/docs/ |
| A D | change-log.md | 2578 - SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
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| /trusted-firmware-a/docs/build/latex/ |
| A D | trustedfirmware-a.tex | 45412 entry into the secure world. For Cortex\sphinxhyphen{}A8, also set \sphinxcode{\sphinxupquote{ACTLR…
45415 \sphinxcode{\sphinxupquote{ACTLR{[}0{]}}} to 1 during early processor initialization, and invalidat…
60127 SCTLR and ACTLR are 32\sphinxhyphen{}bit for AArch32 and 64\sphinxhyphen{}bit for AArch64
61706 Save value of ACTLR\_EL1 implementation\sphinxhyphen{}defined register in the CPU context
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