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Searched refs:ALIGN (Results 1 – 25 of 28) sorted by relevance

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/trusted-firmware-a/build/qemu/release/bl2/
A Dbl2.ld10 ASSERT(. == ALIGN(((1) << (12))),
17 . = ALIGN(((1) << (12)));
29ALIGN(8); __RT_SVC_DESCS_START__ = .; KEEP(*(rt_svc_descs)) __RT_SVC_DESCS_END__ = .; . = ALIGN(8)…
30 . = ALIGN(((1) << (12)));
34 .data . : ALIGN(1) { __DATA_START__ = .; *(SORT_BY_ALIGNMENT(.data*)) __DATA_END__ = .; } >RAM
36ALIGN(16) { __BSS_START__ = .; *(SORT_BY_ALIGNMENT(.bss*)) *(COMMON) . = ALIGN((1 << 6)); __PMF_TI…
38 coherent_ram (NOLOAD) : ALIGN(((1) << (12))) {
42 . = ALIGN(((1) << (12)));
/trusted-firmware-a/build/qemu/release/bl31/
A Dbl31.ld10 ASSERT(. == ALIGN(((1) << (12))),
18 . = ALIGN(((1) << (12)));
24ALIGN(8); __RT_SVC_DESCS_START__ = .; KEEP(*(rt_svc_descs)) __RT_SVC_DESCS_END__ = .; . = ALIGN(8)…
25 . = ALIGN(8);
33 . = ALIGN(((1) << (12)));
39 .data . : ALIGN(1) { __DATA_START__ = .; *(SORT_BY_ALIGNMENT(.data*)) __DATA_END__ = .; } >RAM
40 .rela.dyn : ALIGN(8) { __RELA_START__ = .; *(.rela*) __RELA_END__ = .; } >RAM
43ALIGN(16) { __BSS_START__ = .; *(SORT_BY_ALIGNMENT(.bss*)) *(COMMON) . = ALIGN((1 << 6)); __PMF_TI…
45 coherent_ram (NOLOAD) : ALIGN(((1) << (12))) {
50 . = ALIGN(((1) << (12)));
/trusted-firmware-a/include/common/
A Dbl_common.ld.h25 . = ALIGN(STRUCT_ALIGN); \
31 . = ALIGN(STRUCT_ALIGN); \
37 . = ALIGN(STRUCT_ALIGN); \
43 . = ALIGN(STRUCT_ALIGN); \
49 . = ALIGN(STRUCT_ALIGN); \
60 . = ALIGN(STRUCT_ALIGN); \
72 . = ALIGN(16); \
98 .data . : ALIGN(DATA_ALIGN) { \
157 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
161 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
[all …]
/trusted-firmware-a/build/qemu/release/bl1/
A Dbl1.ld11 ASSERT(. == ALIGN(((1) << (12))),
18 . = ALIGN(((1) << (12)));
30ALIGN(8); __RT_SVC_DESCS_START__ = .; KEEP(*(rt_svc_descs)) __RT_SVC_DESCS_END__ = .; . = ALIGN(8)…
32 . = ALIGN(16);
37 …ASSERT((((0x0e000000 + 0x00001000) + (0x00060000 - 0x00001000)) - 0x12000) == ALIGN(((1) << (12))),
39 ….data . : ALIGN(16) { __DATA_START__ = .; *(SORT_BY_ALIGNMENT(.data*)) __DATA_END__ = .; } >RAM AT…
43ALIGN(16) { __BSS_START__ = .; *(SORT_BY_ALIGNMENT(.bss*)) *(COMMON) . = ALIGN((1 << 6)); __PMF_TI…
45 coherent_ram (NOLOAD) : ALIGN(((1) << (12))) {
49 . = ALIGN(((1) << (12)));
A Dbl1.map1025 0x0000000000004000 . = ALIGN (0x1000)
1117 0x0000000000004bf8 . = ALIGN (0x8)
1122 0x0000000000004bf8 . = ALIGN (0x8)
1126 0x0000000000004bf8 . = ALIGN (0x8)
1130 0x0000000000004bf8 . = ALIGN (0x8)
1134 0x0000000000004bf8 . = ALIGN (0x8)
1143 0x0000000000004ce8 . = ALIGN (0x8)
1148 0x0000000000004cf0 . = ALIGN (0x10)
1245 0x000000000e04f9c0 . = ALIGN (0x40)
1249 0x000000000e04f9c0 . = ALIGN (0x40)
[all …]
/trusted-firmware-a/plat/rockchip/rk3399/include/
A Dplat.ld.S19 ASSERT(. == ALIGN(PAGE_SIZE),
32 .incbin_sram : ALIGN(PAGE_SIZE) {
36 . = ALIGN(PAGE_SIZE); define
42 .text_sram : ALIGN(PAGE_SIZE) {
47 . = ALIGN(PAGE_SIZE); define
53 .data_sram : ALIGN(PAGE_SIZE) {
57 . = ALIGN(PAGE_SIZE); define
63 .stack_sram : ALIGN(PAGE_SIZE) {
77 ASSERT(. == ALIGN(64 * 1024),
87 . = ALIGN(4096); define
/trusted-firmware-a/bl31/
A Dbl31.ld.S31 ASSERT(. == ALIGN(PAGE_SIZE),
42 . = ALIGN(PAGE_SIZE); define
53 . = ALIGN(8); define
56 . = ALIGN(PAGE_SIZE); define
69 . = ALIGN(8); define
79 . = ALIGN(PAGE_SIZE); define
100 spm_shim_exceptions : ALIGN(PAGE_SIZE) {
103 . = ALIGN(PAGE_SIZE); define
129 . = ALIGN(PAGE_SIZE); define
136 ASSERT(. == ALIGN(PAGE_SIZE),
[all …]
/trusted-firmware-a/plat/rockchip/rk3288/include/
A Dplat_sp_min.ld.S19 ASSERT(. == ALIGN(PAGE_SIZE),
22 .text_sram : ALIGN(PAGE_SIZE) {
27 . = ALIGN(PAGE_SIZE); define
33 .data_sram : ALIGN(PAGE_SIZE) {
37 . = ALIGN(PAGE_SIZE); define
43 .stack_sram : ALIGN(PAGE_SIZE) {
57 ASSERT(. == ALIGN(64 * 1024),
/trusted-firmware-a/bl32/sp_min/
A Dsp_min.ld.S25 ASSERT(. == ALIGN(PAGE_SIZE),
34 . = ALIGN(PAGE_SIZE); define
54 . = ALIGN(8); define
57 . = ALIGN(PAGE_SIZE); define
70 . = ALIGN(8); define
81 . = ALIGN(PAGE_SIZE); define
114 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
129 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/bl2/
A Dbl2_el3.ld.S31 ASSERT(. == ALIGN(PAGE_SIZE),
35 ASSERT(. == ALIGN(PAGE_SIZE),
48 . = ALIGN(PAGE_SIZE); define
58 . = ALIGN(PAGE_SIZE); define
83 . = ALIGN(PAGE_SIZE); define
94 ASSERT(BL2_RW_BASE == ALIGN(PAGE_SIZE),
120 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
129 . = ALIGN(PAGE_SIZE); define
A Dbl2.ld.S22 ASSERT(. == ALIGN(PAGE_SIZE),
35 . = ALIGN(PAGE_SIZE); define
54 . = ALIGN(PAGE_SIZE); define
73 . = ALIGN(PAGE_SIZE); define
96 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
105 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/bl32/tsp/
A Dtsp.ld.S23 ASSERT(. == ALIGN(PAGE_SIZE),
32 . = ALIGN(PAGE_SIZE); define
42 . = ALIGN(PAGE_SIZE); define
62 . = ALIGN(PAGE_SIZE); define
91 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
100 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/bl2u/
A Dbl2u.ld.S24 ASSERT(. == ALIGN(PAGE_SIZE),
33 . = ALIGN(PAGE_SIZE); define
52 . = ALIGN(PAGE_SIZE); define
71 . = ALIGN(PAGE_SIZE); define
94 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
103 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/bl1/
A Dbl1.ld.S30 ASSERT(. == ALIGN(PAGE_SIZE),
39 . = ALIGN(PAGE_SIZE); define
68 . = ALIGN(16); define
87 . = ALIGN(16); define
95 ASSERT(BL1_RW_BASE == ALIGN(PAGE_SIZE),
113 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
122 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/plat/mediatek/mt6795/
A Dbl31.ld.S25 ASSERT(. == ALIGN(2048),
33 ASSERT(. == ALIGN(PAGE_SIZE),
49 . = ALIGN(PAGE_SIZE); define
83 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
98 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/include/plat/arm/common/
A Darm_tzc_dram.ld.S18 ASSERT(. == ALIGN(PAGE_SIZE),
20 el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) {
25 . = ALIGN(PAGE_SIZE); define
A Darm_reclaim_init.ld.S13 . = ALIGN(PAGE_SIZE); define
17 INIT_CODE_END_ALIGNED = ALIGN(PAGE_SIZE);
40 . = ALIGN(PAGE_SIZE); \
/trusted-firmware-a/services/std_svc/rmmd/trp/
A Dlinker.lds28 . = ALIGN(8);
32 . = ALIGN(PAGE_SIZE_4K);
38 . = ALIGN(PAGE_SIZE_4K);
/trusted-firmware-a/plat/arm/board/arm_fpga/
A Dbuild_axf.ld.S35 ASSERT(. == ALIGN(PAGE_SIZE), "BL31_BASE is not page aligned");
40 ASSERT(. == ALIGN(8), "DTB address is not 8-byte aligned");
/trusted-firmware-a/plat/st/stm32mp1/
A Dstm32mp1.ld.S31 . = ALIGN(4); define
37 . = ALIGN(PAGE_SIZE); define
/trusted-firmware-a/plat/rockchip/rk3399/drivers/m0/src/
A Drk3399m0.ld.S21 . = ALIGN(8); define
/trusted-firmware-a/plat/socionext/synquacer/include/
A Dplat.ld.S26 sp_xlat_table (NOLOAD) : ALIGN(PAGE_SIZE) {
/trusted-firmware-a/plat/rockchip/rk3328/include/
A Dplat.ld.S23 ASSERT(. == ALIGN(64 * 1024),
/trusted-firmware-a/plat/rockchip/rk3368/include/
A Dplat.ld.S23 ASSERT(. == ALIGN(64 * 1024),
/trusted-firmware-a/plat/rockchip/px30/include/
A Dplat.ld.S24 ASSERT(. == ALIGN(64 * 1024),

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