Searched refs:ARM_DRAM1_BASE (Results 1 – 15 of 15) sorted by relevance
20 #define ARM_DRAM1_BASE UL(0x80000000) macro22 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \97 #define BOOT_BASE ARM_DRAM1_BASE100 #define ARM_NS_DRAM1_BASE (ARM_DRAM1_BASE + BOOT_SIZE)271 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + U(0x8000000))
117 #define ARM_SCP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \125 #define ARM_L1_GPT_ADDR_BASE (ARM_DRAM1_BASE + \131 #define ARM_REALM_BASE (ARM_DRAM1_BASE + \145 #define ARM_AP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \197 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE203 #define ARM_DRAM1_BASE PLAT_ARM_DRAM1_BASE macro205 #define ARM_DRAM1_BASE ULL(0x80000000) macro209 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \
24 #define ARM_DRAM1_BASE UL(0x80000000) macro26 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \34 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE258 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + U(0x8000000))
130 #define ARM_DRAM1_BASE UL(0x80000000) macro132 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \136 #define ARM_DRAM2_BASE ARM_DRAM1_BASE140 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
33 #define N1SDP_REMOTE_DRAM1_BASE ARM_DRAM1_BASE + \115 ARM_DRAM1_BASE, \
51 #define ARM_DRAM1_BASE UL(0x80000000) macro53 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \55 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
106 zero_normalmem((void *)ARM_DRAM1_BASE, ARM_DRAM1_SIZE); in dmc_ecc_setup()107 flush_dcache_range(ARM_DRAM1_BASE, ARM_DRAM1_SIZE); in dmc_ecc_setup()
43 #define JUNO_NS_DRAM1_PT1_BASE ARM_DRAM1_BASE
87 ARM_DRAM1_BASE, \
82 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
79 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
38 #define TC_NS_DRAM1_BASE ARM_DRAM1_BASE
254 {CSS_SGI_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_BASE, \
80 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + UL(0x8000000))
205 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
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