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Searched refs:BASE_GICR_BASE (Results 1 – 13 of 13) sorted by relevance

/trusted-firmware-a/plat/arm/board/fvp/
A Dfvp_def.h64 #define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \
68 #define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \
139 #define BASE_GICR_BASE UL(0x2f100000) macro
A Dfvp_gicv3.c79 int ret = xlat_change_mem_attributes(BASE_GICR_BASE + in fvp_gicv3_make_rdistrif_rw()
A Dfvp_common.c58 #define MAP_GICR_MEM MAP_REGION_FLAT(BASE_GICR_BASE, \
/trusted-firmware-a/plat/qti/sc7180/inc/
A Dplatform_def.h131 #define BASE_GICR_BASE 0x17A60000 macro
137 #define QTI_GICR_BASE BASE_GICR_BASE
/trusted-firmware-a/plat/qti/sc7280/inc/
A Dplatform_def.h131 #define BASE_GICR_BASE 0x17A60000 macro
137 #define QTI_GICR_BASE BASE_GICR_BASE
/trusted-firmware-a/plat/mediatek/mt8173/
A Dplat_mt_gic.c27 BASE_GICR_BASE, in plat_mt_gic_init()
/trusted-firmware-a/plat/rockchip/rk3399/
A Drk3399_def.h30 #define BASE_GICR_BASE (GIC500_BASE + SIZE_M(1)) macro
/trusted-firmware-a/plat/rockchip/rk3399/include/
A Dplatform_def.h90 #define PLAT_RK_GICR_BASE BASE_GICR_BASE
/trusted-firmware-a/plat/mediatek/mt8173/include/
A Dmt8173_def.h70 #define BASE_GICR_BASE 0 /* no GICR in GIC-400 */ macro
/trusted-firmware-a/plat/mediatek/mt6795/include/
A Dplatform_def.h60 #define BASE_GICR_BASE (MT_GIC_BASE + 0x200000) macro
/trusted-firmware-a/plat/arm/board/fvp_r/include/
A Dplatform_def.h251 #define PLAT_ARM_GICR_BASE BASE_GICR_BASE
/trusted-firmware-a/plat/arm/board/fvp/include/
A Dplatform_def.h303 #define PLAT_ARM_GICR_BASE BASE_GICR_BASE
/trusted-firmware-a/plat/mediatek/mt8183/include/
A Dplatform_def.h119 #define BASE_GICR_BASE (MT_GIC_BASE + 0x100000) macro

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