Searched refs:BITS_WMSK (Results 1 – 4 of 4) sorted by relevance
/trusted-firmware-a/plat/rockchip/rk3328/drivers/pmu/ |
A D | pmu.c | 413 BITS_WMSK(0x3fff, 0) | in pm_plls_resume() 414 BITS_WMSK(0x3u, 14)); in pm_plls_resume() 418 ddr_data.clk_sel18 | BITS_WMSK(0x3, 8)); in pm_plls_resume() 422 ddr_data.clk_sel24 | BITS_WMSK(0x7f, 8)); in pm_plls_resume() 426 ddr_data.clk_sel20 | BITS_WMSK(0x1f, 0)); in pm_plls_resume() 430 ddr_data.clk_sel1 | BITS_WMSK(0xf, 0)); in pm_plls_resume() 434 ddr_data.clk_sel0 | BITS_WMSK(0x1f, 0)); in pm_plls_resume() 486 sram_data.pmic_sleep_save | BITS_WMSK(0xffffu, 0)); in rk3328_pmic_resume()
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/trusted-firmware-a/plat/rockchip/px30/drivers/soc/ |
A D | soc.h | 12 #ifndef BITS_WMSK 13 #define BITS_WMSK(msk, shift) ((msk) << (shift + REG_MSK_SHIFT)) macro
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/trusted-firmware-a/plat/rockchip/rk3328/drivers/soc/ |
A D | soc.h | 20 #ifndef BITS_WMSK 21 #define BITS_WMSK(msk, shift) ((msk) << (shift + REG_MSK_SHIFT)) macro
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/trusted-firmware-a/plat/rockchip/px30/drivers/pmu/ |
A D | pmu.c | 636 ddr_data.pmu_cru_clksel_con0 | BITS_WMSK(0x3U, 14)); in pvtm_32k_config_restore() 677 ddr_data.pmugrf_soc_con0 | BITS_WMSK(0x1, 12)); in ddr_sleep_config_restore() 681 ddr_data.ddrgrf_con0 | BITS_WMSK(0x1, 4)); in ddr_sleep_config_restore() 684 ddr_data.ddrgrf_con0 | BITS_WMSK(0x1, 5)); in ddr_sleep_config_restore() 688 ddr_data.ddrstdby_con0 | BITS_WMSK(0x1, 0)); in ddr_sleep_config_restore() 692 ddr_data.ddrgrf_con1 | BITS_WMSK(0x1f, 0)); in ddr_sleep_config_restore() 696 ddr_data.ddrc_pwrctrl | BITS_WMSK(0x3, 0)); in ddr_sleep_config_restore() 955 ddr_data.clk_sel0 | BITS_WMSK(0xf, 8)); in pm_plls_resume() 959 ddr_data.clk_sel0 | BITS_WMSK(0xf, 0)); in pm_plls_resume()
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